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USB3503 数据表(PDF) 46 Page - SMSC Corporation

部件名 USB3503
功能描述  USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications
PDF  82 Pages
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制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

USB3503 数据表(HTML) 46 Page - SMSC Corporation

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USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications
Datasheet
SMSC USB3503A
46
Revision 1.1 (02-07-13)
DATASHEET
application. Typical applications are expected to use pullup values between 220Ω and
2.7kΩ for operation at 1MHz on SCL and SDA. Larger pullup resistors may be acceptable
for operation at 400KHz or 100KHz.
6.3
I2
C Message format
6.3.1
Sequential Access Writes
The I2C interface will support sequential writing of the register address space of the USB3503. This
mode is useful for configuring contiguous blocks of registers. Please see section on SOC interface for
address definitions. Figure 6.2 shows the format of the sequential write operation. Where color is
visible in the figure, blue indicates signaling from the I2C master, and gray indicates signaling from the
USB3503 slave:
In this operation, following the 7-bit slave address, an 8-bit register address is written indicating the
start address for sequential write operation. Every data access after that is a data write to a data
register where the register address increments after each access and ACK from the slave must occur.
Sequential write access is terminated by a Stop condition.
6.3.2
Sequential Access Reads
The I2C interface will support direct reading of the USB3503 registers. In order to read one or more
register addresses, the starting address must be set by using a write sequence followed by a read.
The read register interface supports auto-increment mode. The master should send a NACK instead
of an ACK when the last byte has been transferred.
In this operation, following the 7-bit slave address, 8-bit register address is written indicating the start
address for sequential read operation to be followed. In the read sequence, every data access is a
data read from a data register where the register address increments after each access. Write
sequence can end with optional Stop (P). If so the Read sequence must start with a Start (S) otherwise
it must start with Repeated Start (Sr).
Figure 6.2 I2C Sequential Access Write Format
S
7-Bit Slave Address
0
P
A
nnnnnnnn
Data value for
XXXXXX
...
nnnnnnnn
A
Data value for
XXXXXX + y
A
xxxxxxxx
A
Register
Address
(bits 7-0)



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