MOS6020 datasheet(18/34 Pages) MICROCHIP

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MCP16321/2

DS22285A-page 18

4.2.2

PEAK CURRENT MODE CONTROL

The MCP16321/2 integrates a Peak Current Mode

Control architecture, resulting in superior AC regulation

while minimizing the number of voltage loop

compensation components, and their size, for

integration. Peak Current Mode Control takes a small

portion of the inductor current, replicates it and

compares this replicated current sense signal with the

output of the integrated error voltage. In practice, the

inductor current and the internal switch current are

equal during the switch-on time. By adding this peak

current sense to the system control, the step-down

power train system can be approximated by a 1st order

system rather than a 2nd order system. This reduces

the system complexity and increases its dynamic

performance.

For Pulse-Width Modulation (PWM) duty cycles that

exceed 50%, the control system can become bimodal,

where a wide pulse followed by a short pulse repeats

instead of the desired fixed pulse width. To prevent this

mode of operation, an internal compensating ramp is

summed into the current sense signal.

4.2.3

PULSE WIDTH MODULATION

(PWM)

The internal oscillator periodically starts the switching

period, which in the MCP16321/2’s case occurs every

1 µs or 1 MHz. With the high-side integrated

N-Channel MOSFET turned on, the inductor current

ramps up until the sum of the current sense and slope

compensation ramp exceeds the integrated error

amplifier output. Once this occurs, the high-side switch

turns off and the low-side switch turns on. The error

amplifier output slews up or down to increase or

decrease the inductor peak current feeding into the

output LC filter. If the regulated output voltage is lower

than its target, the inverting error amplifier output rises.

This results in an increase in the inductor current to

correct for errors in the output voltage. The fixed

frequency duty cycle is terminated when the sensed

inductor peak current, summed with the internal slope

compensation, exceeds the output voltage of the error

amplifier. The PWM latch is set by turning off the high-

side internal switch and preventing it from turning on

until the beginning of the next cycle.

4.2.4

HIGH-SIDE DRIVE

The MCP16321/2 features an integrated high-side

N-Channel MOSFET for high efficiency step-down

power conversion. An N-Channel MOSFET is used for

its low resistance and size (instead of a P-Channel

MOSFET). The N-Channel MOSFET gate must be

driven above its source to fully turn on the device,

resulting in a gate-drive voltage above the input to turn

on the high-side N-Channel. The high-side N-Channel

source is connected to the inductor and boost cap or

switch node. When the high-side switch is off and the

low-side is on, the inductor current flows through the

low-side switch, providing a path to recharge the boost

cap from the boost voltage source. An internal boost-

blocking diode is used to prevent current flow from the

boost cap back into the output during the internal

switch-on time. Prior to startup, the boost cap has no

stored charge to drive the switch. An internal regulator

is used to “pre-charge” the boost cap. Once pre-

charged, the switch is turned on and the inductor

current flows. When the high-side switch turns off and

the low-side turns on, current freewheels through the

inductor and low-side switch, providing a path to

recharge the boost cap. When the duty cycle

approaches its maximum value, there is very little time

for the boost cap to be recharged due to the short

amount time that the low-side switch is on. Therefore,

when the maximum duty cycle approaches, the switch

node is forced off for 240 ns every 8 cycles to ensure

that the boost cap gets replenished.

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