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MCP4341T502E/ML 数据表(PDF) 53 Page - Microchip Technology |
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MCP4341T502E/ML 数据表(HTML) 53 Page - Microchip Technology |
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53 / 80 page ![]() © 2009 Microchip Technology Inc. DS22233A-page 53 MCP434X/436X 7.5.3 CONTINUOUS WRITES TO VOLATILE MEMORY Continuous writes are possible only when writing to the volatile memory registers (address 00h, 01h, and 04h). Figure 7-3 shows the sequence for three continuous writes. The writes do not need to be to the same volatile memory address. 7.5.4 CONTINUOUS WRITES TO NON-VOLATILE MEMORY Continuous writes to non-volatile memory are not allowed, and attempts to do so will result in a command error (CMDERR) condition. FIGURE 7-3: Continuous Write Sequence (Volatile Memory only). A D 3 A D 2 A D 1 A D 0 00 D 9 D 8 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 111111 1* 111111111 A D 3 A D 2 A D 1 A D 0 00 D 9 D 8 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 111111 1* 111111111 A D 3 A D 2 A D 1 A D 0 00 D 9 D 8 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 111111 1* 111111111 COMMAND BYTE DATA BYTE SDI SDO Note 1: If a Command Error (CMDERR) occurs at this bit location (*), then all following SDO bits will be driven low until the CS pin is driven inactive (VIH). |
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