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AD7680 数据表(PDF) 13 Page - Analog Devices |
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AD7680 数据表(HTML) 13 Page - Analog Devices |
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13 / 24 page ![]() AD7946 Rev. A | Page 13 of 24 TYPICAL CONNECTION DIAGRAM Figure 25 shows an example of the recommended connection diagram for the AD7946 when multiple supplies are available. AD7946 REF GND VDD IN– IN+ VIO SDI SCK SDO CNV 3- OR 4-WIRE INTERFACE (NOTE 5) 100nF 100nF 5V 10µF (NOTE 2) V+ V+ V– 1.8V TO VDD REF 0V TO REF 33Ω 2.7nF NOTES 1. SEE REFERENCE SECTION FOR REFERENCE SELECTION. 2. CREF IS USUALLY A 10µF CERAMIC CAPACITOR (X5R). 3. SEE DRIVER AMPLIFIER CHOICE SECTION. 4. OPTIONAL FILTER. SEE ANALOG INPUT SECTION. 5. SEE DIGITAL INTERFACE FOR MOST CONVENIENT INTERFACE MODE. (NOTE 1) (ADA4841 OR NOTE 3) (NOTE 4) Figure 25. Typical Application Diagram with Multiple Supplies ANALOG INPUT Figure 26 shows an equivalent circuit of the input structure of the AD7946. The two diodes, D1 and D2, provide ESD protection for the analog inputs IN+ and IN−. Care must be taken to ensure that the analog input signal never exceeds the supply rails by more than 0.3 V because this causes these diodes to begin to forward- bias and start conducting current. These diodes can handle a maximum forward-biased current of 130 mA. For instance, these conditions could eventually occur when the input buffer’s (U1) supplies are different from VDD. In such a case, an input buffer with a short-circuit current limitation can be used to protect the part. CIN RIN D1 D2 CPIN IN+ OR IN– GND VDD Figure 26. Equivalent Analog Input Circuit The analog input structure allows the sampling of the differential signal between IN+ and IN−. By using this differential input, small signals common to both inputs are rejected, as shown in Figure 27, which represents the typical CMRR over frequency. For instance, by using IN− to sense a remote signal ground, ground potential differences between the sensor and the local ADC ground are eliminated. FREQUENCY (kHz) 50 40 60 70 10 1 100 1k 10k VDD = 5V Figure 27. Analog Input CMRR vs. Frequency During the acquisition phase, the impedance of the analog inputs (IN+ or IN−) can be modeled as a parallel combination of capacitor, CPIN, and the network formed by the series connec- tion of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically 600 Ω and is a lumped component made up of some serial resistors and the on resistance of the switches. CIN is typically 30 pF and is mainly the ADC sampling capacitor. During the conversion phase, when the switches are opened, the input impedance is limited to CPIN. RIN and CIN make a 1-pole, low-pass filter, which reduces undesirable aliasing effects and limits the noise. When the source impedance of the driving circuit is low, the AD7946 can be driven directly. Large source impedances significantly affect the ac performance, especially total harmonic distortion (THD). The dc performances are less sensitive to the input impedance. The maximum source impedance depends on the amount of THD that can be |
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