CC2500-RTR1 datasheet(33/99 Pages) TI1

33 / 99 page

CC2500

SWRS040C

Page 33 of 89

bytes that contain CRC status, link quality

indication and RSSI value.

15.7

Packet Handling in Firmware

When implementing a packet oriented radio

protocol in firmware, the MCU needs to know

when a packet has been received/transmitted.

Additionally, for packets longer than 64 bytes

the RX FIFO needs to be read while in RX and

the TX FIFO needs to be refilled while in TX.

This means that the MCU needs to know the

number of bytes that can be read from or

written

the

FIFO

and

FIFO

respectively. There are two possible solutions

to get the necessary status information:

a) Interrupt driven solution

In both RX and TX one can use one of the GDO

pins to give an interrupt when a sync word has

been

received/transmitted

and/or

when

complete

packet

has

been

received/transmitted

(IOCFGx=0x06).

addition, there are two configurations for the

IOCFGx

RX FIFO (IOCFGx=0x00 and IOCFGx=0x01)

and two that are associated with the TX FIFO

(IOCFGx=0x02 and IOCFG=0x03) that can be

used

interrupt

sources

provide

information on how many bytes are in the RX

FIFO and TX FIFO respectively. See Table 33.

b) SPI polling

The PKTSTATUS register can be polled at a

given rate to get information about the current

GDO2

and GDO0 values respectively. The

RXBYTES

and TXBYTES registers can be

polled at a given rate to get information about

the number of bytes in the RX FIFO and TX

FIFO respectively. Alternatively, the number of

bytes in the RX FIFO and TX FIFO can be

read from the chip status byte returned on the

MISO line each time a header byte, data byte,

or command strobe is sent on the SPI bus.

It is recommended to employ an interrupt

driven solution as high rate SPI polling will

reduce the RX sensitivity. Furthermore, as

explained in Section 10.3 and the

CC2500

Errata Notes [1], when using SPI polling there

is a small, but finite, probability that a single

read from registers PKTSTATUS, RXBYTES and

TXBYTES

is being corrupt. The same is the

case when reading the chip status byte.

Refer to the TI website for SW examples ([6]

and [7]).

16 Modulation Formats

CC2500 supports amplitude, frequency and

phase shift modulation formats. The desired

modulation

format

set

the

MDMCFG2.MOD_FORMAT

Optionally, the data stream can be Manchester

coded by the modulator and decoded by the

demodulator. This option is enabled by setting

MDMCFG2.MANCHESTER_EN

=1.

Manchester

encoding is not supported at the same time as

using the FEC/Interleaver option.

16.1

Frequency Shift Keying

2-FSK

can

optionally

shaped

Gaussian filter with BT=1, producing a GFSK

modulated signal.

The frequency deviation is programmed with

the DEVIATION_M and DEVIATION_E values

in the DEVIATN register. The value has an

exponent/mantissa form, and the resultant

deviation is given by:

DEVIATION

xosc

dev

DEVIATION

)

(









The symbol encoding is shown in Table 23.

Format

Symbol

Coding

2-FSK/GFSK

‘0’

– Deviation

‘1’

+ Deviation

Table 23: Symbol Encoding for 2-FSK/GFSK

Modulation

16.2

Minimum Shift Keying

When using MSK

1, the complete transmission

(preamble, sync word and payload) will be

MSK modulated.

Phase shifts are performed with a constant

transition time.

Identical to offset QPSK with half-sine

shaping (data coding may differ)

CC2500-RTR1 数据表(PDF) 33 Page - Texas Instruments

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