LM92

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SNIS110D – MARCH 2000 – REVISED MARCH 2013

Figure 9. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero (“0”)

POINTER REGISTER

(Selects which registers will be read from or written to):

P7

P6

P5

P4

P3

P2

P1

P0

0

0

0

0

0

Register Select

P0–P2: Register Select:

P2

P1

P0

Register

0

0

0

Temperature (Read only) (Power-up default)

0

0

1

Configuration (Read/Write)

0

1

0

0

1

1

T_CRIT (Read/Write)

1

0

0

1

0

1

1

1

1

Manufacturer's ID

P3–P7: Must be kept zero.

TEMPERATURE REGISTER

Table 3. (Read Only):

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Sign

MSB

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

CRIT

HIGH

LOW

Status Bits

D0–D2: Status Bits

D3–D15: Temperature Data. One LSB = 0.0625°C. Two's complement format.

CONFIGURATION REGISTER

Table 4. (Read/Write):

D7

D6

D5

D4

D3

D2

D1

D0

0

0

0

Fault Queue

INT Polarity

T_CRIT_A

INT Mode

Shutdown

Polarity

D0: Shutdown - When set to 1 the LM92 goes to low power shutdown mode. Power up default of “0”.

D1: Interrupt mode - 0 is Comparator Interrupt mode, 1 is Event Interrupt mode. Power up default of “0”.

D2, D3: T_CRIT_A and INT Polarity - 0 is active low, 1 is active high. Outputs are open-drain. Power up default

of “0”

D4: Fault Queue - When set to 1 the Fault Queue is enabled, see FAULT QUEUE. Power up default of “0”.

D5–D7: These bits are used for production testing and must be kept zero for normal operation.

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