PCA9554_9554A

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Product data sheet

Rev. 9 — 19 March 2013

7 of 35

NXP Semiconductors

PCA9554; PCA9554A

6.1.2 Register 0 - Input Port register

This register is a read-only port. It reflects the incoming logic levels of the pins, regardless

of whether the pin is defined as an input or an output by Register 3. Writes to this register

have no effect.

The default ‘X’ is determined by the externally applied logic level, normally ‘1’ when no

external signal externally applied because of the internal pull-up resistors.

6.1.3 Register 1 - Output Port register

This register reflects the outgoing logic levels of the pins defined as outputs by Register 3.

Bit values in this register have no effect on pins defined as inputs. Reads from this register

return the value that is in the flip-flop controlling the output selection, not the actual pin

value.

Table 5.

Register 0 - Input Port register bit description

Bit

Symbol

Access

Value

Description

7

I7

read only

X

determined by externally applied logic level

6

I6

read only

X

5

I5

read only

X

4

I4

read only

X

3

I3

read only

X

2

I2

read only

X

1

I1

read only

X

0

I0

read only

X

Table 6.

Register 1 - Output Port register bit description

Legend: * default value.

Bit

Symbol

Access

Value

Description

7

O7

R

1*

reflects outgoing logic levels of pins defined as

outputs by Register 3

6O6

R

1*

5O5

R

1*

4O4

R

1*

3O3

R

1*

2O2

R

1*

1O1

R

1*

0O0

R

1*