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4116R-R2R-503 数据表(PDF) 48 Page - Bourns Electronic Solutions |
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4116R-R2R-503 数据表(HTML) 48 Page - Bourns Electronic Solutions |
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48 / 62 page ![]() Specifications are subject to change without notice. 324 FOR PRODUCT SPECIFICATIONS, SEE PAGES 309 - 311. Typical Application A typical application using a Bourns 801 RC Network in con- junction with a 10K ECL design is shown below. Vee is typically connected to -5.2 volts (10K ECL) or -4.5 volts (100K ECL). Vcc is typically connected to GND. Vtt is typically connected to -2.0 volts. The 801 network shown below can terminate up to 6 transmission lines and provides a 0.01 µF capacitor to reduce cross talk and feedthrough effects. The actual, effective delay and impedance due to loading from stubs or additional devices off the line will be: Tpd’ = Tpd √1 + Cd/Co Zo Zo’ = √1 + (C d/Co) Where Co = intrinsic capacitance of the line Cd = capacitance due to loading and stubs off the line Tpd = basic propagation delay of the line Zo ....= basic impedance of the line To formulate a guideline for when line termination is necessary, take the ratio of the rise time or fall time and the two- way delay along the line. The maximum length for unterminated lines will result as follows: Lmax = Tr 2Tpd’ Where Tr = rise or fall time Tpd = propagation delay per unit length The above equation implies that the faster the edge rate or the higher the loading on the line (i.e., higher fanout), the more likely that termination will be necessary for a given line length. Parallel Termination For maximum circuit performance or distributed loads, parallel termination is the most appropriate technique. A parallel termi- nated line uses a resistor connected to -2 volts (ECL application) at the receiving end. The resistor value matches the characteris- tic impedance of the line (Zo), thereby producing zero reflection at the receiver. In addition, the terminating resistor also provides output pull down, so a separate pull down resistor at the driving end is unnecessary. Transmission Line Considerations In high speed circuit applications, the signal propagation delay (Tpd) and characteristic impedance (zo), along a printed circuit board line must be taken into consideration. In general, if the two-way delay along the line is greater than the rise or fall time of the signal, then controlled impedance techniques (i.e., termi- nation) must be utilized to prevent undesirable ringing or over- and undershoots. The delay and impedance can be calculated by knowing the intrinsic inductance (Lo) and capacitance (Co) of the line: Tpd = √LoCo Zo = √L o/Co Vcc1 Aout A1in Vee Vcc2 Bout B1in A1in A1in A2in A2in B1in B1in B2in B2in B2in A2in, MC10H118 MECL 10KH Vee TRANSMISSION LINES Vtt BOURNS 801 10K ECL TERMINATOR Bourns Emitter Coupled Logic Terminator 800 Series |
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