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PCF8536AT1 数据表(PDF) 29 Page - NXP Semiconductors |
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PCF8536AT1 数据表(HTML) 29 Page - NXP Semiconductors |
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29 / 74 page  PCF8536 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 21 February 2012 29 of 74 NXP Semiconductors PCF8536 Universal LCD low multiplex driver with 6 channel PWM generator 8.5 LCD drive mode waveforms 8.5.1 1:4 Multiplex drive mode When four backplanes are provided in the LCD, the 1:4 multiplex drive mode applies, as shown in Figure 15. This drawing is also showing the case of line inversion (see Section 8.1.4.2). Vstate1(t) = VSn(t) VBP0(t). Vstate2(t) = VSn(t) VBP1(t). Von(RMS)(t) = 0.577VLCD. Voff(RMS)(t) = 0.333VLCD. Fig 15. Waveforms for the 1:4 multiplex drive mode with 1⁄3 bias and line inversion 013aaa211 state 1 BP0 (b) Resultant waveforms at LCD segment. LCD segments state 2 BP1 state 1 state 2 BP2 (a) Waveforms at driver. BP3 Sn Sn+1 Sn+2 Sn+3 Tfr VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 0 V VLCD 2VLCD/3 -2VLCD/3 VLCD/3 -VLCD/3 -VLCD 0 V VLCD 2VLCD/3 -2VLCD/3 VLCD/3 -VLCD/3 -VLCD VSS VLCD 2VLCD/3 VLCD/3 |
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