QUICC

MC68360

CE (ENABLE)

OE (OUTPUT ENABLE)

WE (WRITE)

DATA

ADDRESS

8-BIT BOOT

EPROM

(FLASH OR REGULAR)

CS0

OE

WE0

DATA

ADDRESS

RAS

CAS3–CAS0

W (WRITE)

DATA

ADDRESS

PARITY

16- OR 32-BIT

TWO DRAM SIMMs

(OPTIONAL PARITY)

RAS1

CAS3–CAS0

R/W

RAS

BUFFER

E (ENABLE)

G (OUTPUT ENABLE)

W (WRITE)

DATA

ADDRESS

8-, 16-, OR 32-BIT SRAM

CS7

WE3–WE0

RAS2

PRTY3–PRTY0

Figure 3. Larger QUICC System Configuration

QUICC Serial Configurations

The QUICC offers an extremely flexible set of communications capabilities. Although a full understanding of

Freescale Semiconductor, Inc.

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