ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

Rev. J | Page 17 of 24

Equation 3 shows that the apparent output impedance is reduced

by approximately the excess loop gain; therefore, as the frequency

increases, the excess loop gain decreases, and the apparent output

impedance increases. A passive element whose impedance

increases as its frequency increases is an inductor. When a

capacitor is added to the output of an op amp or a reference, it

forms a tuned circuit that resonates at a certain frequency and

results in gain peaking. This can be observed by using a model

of a semiperfect op amp with a single-pole response and some

pure resistance in series with the output. Changing capacitive

loads results in peaking at different frequencies. For most normal

op amp applications with low capacitive loading (<100 pF), this

effect is usually not observed.

However, references are used increasingly to drive the reference

input of an ADC that may present a dynamic, switching capacitive

load. Large capacitors, in the microfarad range, are used to reduce

the change in reference voltage to less than one-half LSB. Figure 31

shows the ADR431 noise spectrum with various capacitive values

to 50 μF. With no capacitive load, the noise spectrum is relatively

flat at approximately 60 nV/√Hz to 70 nV/√Hz. With various

values of capacitive loading, the predicted noise peaking

becomes evident.

10

100

1000

10

100

1k

10k

100k

ADR431

NO COMPENSATION

FREQUENCY (Hz)

Figure 31. Noise vs. Capacitive Loading

The op amp within the ADR43x family uses the classic RC

compensation technique. Monolithic capacitors in an IC are

limited to tens of picofarads. With very large external capacitive

loads, such as 50 μF, it is necessary to overcompensate the op amp.

The internal compensation node is brought out on Pin 7, and

an external series RC network can be added between Pin 7 and

the output, Pin 6, as shown in Figure 32.

+

NOTES

1. NC = NO CONNECT

2. TP = TEST PIN (DO NOT CONNECT)

1

2

3

4

5

8

6

7

ADR43x

TOP VIEW

(Not to Scale)

TP

COMP

TRIM

TP

NC

GND

10µF

0.1µF

0.1µF

82kΩ

10nF

Figure 32. Compensated Reference

The 82 kΩ resistor and 10 nF capacitor can eliminate the noise

peaking (see Figure 33). The COMP pin should be left

unconnected if unused.

10

100

10

100

1k

10k

FREQUENCY (Hz)

RC 82kΩ AND 10nF

RC 82kΩ AND 10nF

RC 82kΩ AND 10nF

Figure 33. Noise with Compensation Network

TURN-ON TIME

Upon application of power (cold start), the time required for the

output voltage to reach its final value within a specified error band

is defined as the turn-on settling time. Two components normally

associated with this are the time for the active circuits to settle

and the time for the thermal gradients on the chip to stabilize.

Figure 17 and Figure 18 show the turn-on settling time for the

ADR431.