Data Sheet

ADA4895-2

Rev. 0 | Page 17 of 24

THEORY OF OPERATION

AMPLIFIER DESCRIPTION

The ADA4895-2 amplifier has an input noise of 1 nV/√Hz and

consumes 2.8 mA from supply voltages of 3 V to 10 V. Using the

Analog Devices XFCB3 process, the ADA4895-2 has a gain band-

width product in excess of 1.5 GHz and is gain ≥ 10 stable, with

an input structure that results in an extremely low input 1/f noise

for a relatively high speed amplifier.

The rail-to-rail output stage is designed to drive the heavy feed-

back load required to achieve an overall low output referred noise.

The low input noise and high bandwidth of the ADA4895-2 are

achieved with minimal power penalty. For this reason, the maxi-

mum offset voltage of 350 µV and voltage drift of 0.15 µV/°C

make the ADA4895-2 an excellent choice, even when the low

noise performance of the amplifier is not needed.

For any gain greater than 10, the closed-loop frequency response

of a basic noninverting configuration can be approximated by

)

G

F

G

R

R

R

+

For inverting gain configurations, the source impedance must

gain. For gains lower than 10, see the Using the ADA4895-2 at a

Gain < +10 section, or use the ADA4897-2, which is a unity-gain

stable amplifier with 230 MHz bandwidth.

INPUT PROTECTION

The ADA4895-2 is fully protected from ESD events and can with-

stand human body model ESD events of 2.5 kV and charged-device

model events of 1 kV with no measured performance degradation.

The precision input is protected with an ESD network between the

power supplies and diode clamps across the input device pair, as

shown in Figure 37.

+IN

ESD

ESD

BIAS

TO THE REST OF THE AMPLIFIER

–IN

ESD

ESD

Figure 37. Input Stage and Protection Diodes

At differential voltages above approximately 0.7 V, the diode

clamps begin to conduct. Too much current can cause damage

due to excessive heating. If large differential voltages must be

sustained across the input terminals, it is recommended that the

current through the input clamps be limited to less than 10 mA.

Series input resistors that are sized appropriately for the expected

differential overvoltage provide the needed protection.

The ESD clamps begin to conduct at input voltages that are more

than 0.7 V above the positive supply or more than 0.7 V below

the negative supply. If an overvoltage condition is expected, it is

recommended that the fault current be limited to less than 10 mA.

DISABLE OPERATION

Figure 38 shows the ADA4895-2 power-down circuitry. If the

DISABLEx pin is left unconnected, the base of the input PNP

transistor is pulled high through the internal pull-up resistor

to the positive supply and the part is turned on. Pulling the

DISABLEx pin more than 2 V below the positive supply turns

the part off, reducing the supply current to approximately 50 µA

for a 5 V voltage supply.

DISABLEx

ESD

ESD

TO

AMPLIFIER

BIAS

Figure 38. DISABLEx Circuit

The DISABLEx pin is protected by ESD clamps, as shown in

Figure 38. Voltages beyond the power supplies cause these diodes

to conduct. For protection of the DISABLEx pins, the voltage to

these pins should not exceed 0.7 V beyond the supply voltage, or

the input current should be restricted to less than 10 mA with a

series resistor.