8905

3-PHASE BRUSHLESS DC

MOTOR CONTROLLER/DRIVER

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

A once-per-revolution TACH signal can be

generated by counting cycles of FCOM (the

number of motor poles must be selected via the

serial port). TACH is then a jitter-free signal that

toggles once per motor revolution. The rising

edge of TACH triggers REF, a precision speed

reference derived by a programmable counter.

The duration of REF is set by programming the

counter to count the desired number of OSC

cycles

desired

total count

=

where the total count (number of oscillator cycles)

is equal to the sum of the selected (programmed

low) count numbers corresponding to bits D5

through D18.

The speed error is detected as the difference

in falling edges of TACH and REF. The speed

error signals control the error-correcting charge

pump on the FILTER terminal, which drive the

external loop compensation components to correct

the motor current.

Index. An external tachometer signal may be

used to create the TACH signal, rather than the

internally derived once around. To use this mode,

the signal is input to the INDEX terminal, and the

index mode must be enabled via the serial port.

When Switching from the once-around mode to

index mode, it is important to monitor the SYNC

signal on DATA OUT, and switch modes only

when SYNC is low. This ensures making the

transition without disturbing the speed control

loop. The speed reference counter should be

reprogrammed at the same time.

Speed Loop Initialization (YANK). To

improve the acquire time of the speed control

loop, there is an automatic feature controlled by an

internal YANK signal. The motor is started at the

maximized programmed current by bypassing the

FILTER terminal. The FILTER terminal is

clamped to two diodes above ground, initializing it

near the closed loop operating point. YANK is

enabled at startup and stays high until the desired

speed is reached. Once the first error-fast occurs,

indicating the motor crossed through the desired

speed, YANK goes low. This releases the clamp

on the FILTER terminal and current control is

returned to FILTER. This feature optimizes speed

The watchdog timing function allows time to detect correct motor position

by checking the back-EMF polarity after each commutation. If the correct

polarity is not observed between t

commutates the outputs to the next state to synchronize the motor. This

function is useful in preventing excessive reverse rotation, and helps in

resynchronizing (or starting) with a moving spindle.

Current Control. The A8905CLB provides linear current control via the

FILTER terminal, an analog voltage input. Maximum current limit is also

provided, and is controlled in four steps via the serial port. Output current is

is compared to one-tenth the voltage at the FILTER terminal less two diode

drops, or to the maximum current limit reference, whichever is lower. This

nominally 0.3

Ω and V

YANK

SPEED-CONTROL

INITIALIZATION

POWER UP

ERROR FAST

FROM FLL

S

Q

R

C

R

C

FILTER

Id

F2

F1

F1

Ic

ERROR SLOW

FROM FLL

CHARGE

ERROR FAST

OUT

V

BB

÷10

SEQUENTIAL

LOGIC

C

RES

BOOST

CHARGE

PUMP

MUX

–

+

LINEAR

CURRENT CONTROL

FROM

SERIAL PORT

REGISTER

D3 AND D4

1.85 V

x1

R

S

Speed Control. The A8905CLB includes a frequency-locked loop speed

control system. This system monitors motor speed via internal or external

digital tachometer signals, generates a precision speed reference, determines

the digital speed error, and corrects the motor current via an internal charge

pump and external filtering components on the FILTER terminal.

desired motor speed (rpm)

Dwg. EP-046

Dwg. EP-045

SECTOR

FCOM

TACH

D5–D18

D19

D20 &

D21

OSC

REF

4-BIT

FIXED

COUNTER

14-BIT

PROGRAMMABLE

COUNTER

SERIAL PORT

REGISTER

COUNT

(3 x MOTOR POLES)

MUX

÷2

REF

TACH

ERROR

FAST

ONCE-AROUND

PULSE

REF

TACH

ERROR

SLOW