数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

MP3391EY 数据表(PDF) 14 Page - Monolithic Power Systems

部件名 MP3391EY
功能描述  8-Channel, 120mA/ch Step-Up WLED Driver Controller
PDF  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MPS [Monolithic Power Systems]
网页  http://www.monolithicpower.com
标志 MPS - Monolithic Power Systems

MP3391EY 数据表(HTML) 14 Page - Monolithic Power Systems

Back Button MP3391EY Datasheet HTML 10Page - Monolithic Power Systems MP3391EY Datasheet HTML 11Page - Monolithic Power Systems MP3391EY Datasheet HTML 12Page - Monolithic Power Systems MP3391EY Datasheet HTML 13Page - Monolithic Power Systems MP3391EY Datasheet HTML 14Page - Monolithic Power Systems MP3391EY Datasheet HTML 15Page - Monolithic Power Systems MP3391EY Datasheet HTML 16Page - Monolithic Power Systems MP3391EY Datasheet HTML 17Page - Monolithic Power Systems MP3391EY Datasheet HTML 18Page - Monolithic Power Systems  
Zoom Inzoom in Zoom Outzoom out
 14 / 18 page
background image
MP3391—8-CHANNEL, 120mA/CH STEP-UP WLED DRIVER CONTROLLER
MP3391 Rev. 1.11
www.MonolithicPower.com
14
3/14/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
Figure 4—Direct PWM Dimming
Table 1 shows the PWM dimming duty Range
with different PWM dimming frequency.
Tab 1 The Range of PWM Dimming Duty
fpwm(Hz)
Dmin
Dmax
100<f≤200
0.30%
100%
200<f≤500
0.75%
100%
500<f≤1k
1.50%
100%
1k<f≤2k
3.00%
100%
2k<f≤5k
7.50%
100%
5k<f≤10k
15.00%
100%
10k<f≤13k
19.00%
100%
13k<f≤20k
30.00%
100%
2. DC Input PWM Dimming
To apply DC input PWM dimming, apply an
analog signal (range from 0.2 V to 1.2V) to the
DBRT pin to modulate the LED current directly. If
the PWM is applied with a zero DC voltage, the
PWM duty cycle will be 0%. If the DBRT pin is
applied with a DC voltage>1.2V, the output will
be 100% (See Figure 5). The capacitor on BOSC
pin set the frequency of internal triangle
waveform according to the equation:
FDPWM(Hz) = 3.5 / CBOSC(μF)
C1
BOSC
DBRT
MP3391
DC Signal
Figure 5—DC input PWM Dimming
Layout Considerations
Careful attention must be paid to the PCB board
layout and components placement. Proper layout
of the high frequency switching path is critical to
prevent noise and electromagnetic interference
problems. The loop of external MOSFET (M2),
output diode (D1), and output capacitor (C2,C3)
is flowing with high frequency pulse current. it
must be as short as possible (See Figure 6).
Figure 6—Layout Consideration
The IC exposed pad is internally connected to
GND pin, and all logic signals are refer to the
GND. The PGND should be externally connected
to GND and is recommended to keep away from
the logic signals.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com