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GAL22V10D-25LS 数据表(PDF) 8 Page - Lattice Semiconductor

部件名 GAL22V10D-25LS
功能描述  All Devices Discontinued
PDF  23 Pages
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制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor

GAL22V10D-25LS 数据表(HTML) 8 Page - Lattice Semiconductor

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Specifications GAL22V10
6
DIP (PLCC) Package Pinouts
1 (2)
22 (26)
OLMC
S0
5810
S1
5811
0440
.
.
.
.
0880
2 (3)
ASYNCHRONOUS RESET
(TO ALL REGISTERS)
0
4
8
12
162024
283236
40
SYNCHRONOUS PRESET
(TO ALL REGISTERS)
10 (12)
0000
5764
0044
.
.
.
0396
23 (27)
S0
5808
S1
5809
21 (25)
OLMC
S0
5812
S1
5813
0924
.
.
.
.
.
1452
3 (4)
4 (5)
5 (6)
20 (24)
OLMC
S0
5814
S1
5815
1496
.
.
.
.
.
.
2112
19 (23)
OLMC
S0
5816
S1
5817
2156
.
.
.
.
.
.
.
2860
18 (21)
OLMC
S0
5818
S1
5819
2904
.
.
.
.
.
.
.
3608
17 (20)
OLMC
S0
5820
S1
5821
3652
.
.
.
.
.
.
4268
OLMC
S0
5822
S1
5823
4312
.
.
.
.
.
4840
8 (10)
16 (19)
15 (18)
OLMC
S0
5824
S1
5825
4884
.
.
.
.
5324
9 (11)
5368
.
.
.
5720
14 (17)
OLMC
S0
5826
S1
5827
7 (9)
6 (7)
11 (13)
13 (16)
8
10
14
16
12
12
16
14
10
8
OLMC
Electronic Signature
5828, 5829 ...
... 5890, 5891
L
S
B
M
S
B
Byte 7 Byte 6 Byte 5 Byte 4
Byte 2 Byte 1 Byte 0
Byte 3
GAL22V10 Logic Diagram / JEDEC Fuse Map



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