MP28115 – 4A, 1.5MHz SYNCHRONOUS STEP-DOWN CONVERTER

MP28115 Rev. 0.92

www.MonolithicPower.com

9

8/23/2010

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

© 2010 MPS. All Rights Reserved.

Output Capacitor Selection

The output capacitor keeps output voltage ripple

small and ensures a stable regulation loop. The

output capacitor impedance shall be low at the

switching frequency. Ceramic capacitors with

X5R or X7R dielectrics are recommended. The

Δ≤

OUT

IN

OUT

OUT

IN

OSC

OSC

3

Vx(V - V

)

1

V

x(ESR +

)

V xf

xL

8xf

xC

External Schottky Diode

For this part, an external schottky diode is

recommended to be placed close to "SW" and

"GND" pins, especially when the output current is

larger than 2A.

With the external schottky diode, the voltage

spike and negative kick on "SW" pin can be

minimized; moreover, the conversion efficiency

can also be improved a little.

For the external schottky diode selection, it's

noteworthy that the maximum reverse voltage

rating of the external diode should be larger than

the maximum input voltage. As for the current

rating of this diode, 0.5A rating should be

sufficient.

PCB Layout Guide

PCB layout is very important to achieve stable

operation. It is highly recommended to duplicate

EVB layout for optimum performance. If change

is necessary, please follow these guidelines as

follows. Here, the typical application circuit is

taken as an example to illustrate the key layout

rules should be followed.

1) For MP28115, a PCB layout with more than

(or) four layers is recommended.

2) The high current paths (GND, IN and SW)

should be placed very close to the device with

short, direct and wide traces.

3) For MP28115, two input ceramic capacitors

(2 x (10μF~22μF)) are strongly recommended to

be placed on both sides of the MP28115

package and keep them as close as possible to

the “IN” and “GND” pins. If this placement is not

possible, a ceramic cap (10μF~47μF) must be

placed across PIN7-“IN”and PIN9-“GND” since

the internal Vcc supply is powered from PIN7,

and good decoupling is needed to avoid any

interference issues.

4) The external feedback resistors shall be

placed next to the FB pin. Keep the FB trace as

short as possible. Don’t place test points on FB

trace if possible.

5) Keep the switching node SW short and away

from the feedback network.