14

Am28F010A

Write Operation Status

Data Polling—DQ7

The device features Data# Polling as a method to indi-

cate to the host system that the Embedded algorithms

are either in progress or completed.

While the Embedded Programming algorithm is in oper-

ation, an attempt to read the device at a valid address

will produce the complement of expected Valid data on

DQ7. Upon completion of the Embedded Program algo-

rithm an attempt to read the device at a valid address will

produce Valid data on DQ7. The Data# Polling feature is

valid after the rising edge of the second WE# pulse of

the two write pulse sequence.

While the Embedded Erase algorithm is in operation,

DQ7 will read “0" until the erase operation is com-

pleted. Upon completion of the erase operation, the

data on DQ7 will read “1.” The Data# Polling feature is

valid after the rising edge of the second WE# pulse of

the two Write pulse sequence.

The Data# Polling feature is only active during Embed-

ded Programming or erase algorithms.

See Figures 3 and 4 for the Data# Polling timing spec-

ifications and diagrams. Data# Polling is the standard

method to check the write operation status, however,

an alternative method is available using Toggle Bit.

START

Fail

No

DQ7 = Data

?

DQ7 = Data

?

DQ5 = 1

?

No

Pass

Yes

No

Yes

Read Byte

(DQ0–DQ7)

Addr = VA

Read Byte

(DQ0–DQ7)

Addr = VA

Yes

VA = Byte address for programming

= XXXXh during chip erase

16778D-8

Note:

DQ7 is rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5 or after DQ5.

Figure 3.