ST8024LCDR datasheet(12/35 Pages) STMICROELECTRONICS

12 / 35 page

Electrical characteristics

ST8024L

12/35

Doc ID 17709 Rev 5

|ICC|

Card supply current

VCC = 0 to 5 V

VCC = 0 to 3 V

VCC = 0 to 1.8 V

VCC short-circuit to GND

120

Slew rate

Slew up or down, VCC = 5 V; 3 V; 1.8 V;

|ICC| < 30 mA

0.08

0.15

0.22

V/µs

VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are at TA = 25 °C. (All parameters remain

within limits but are tested only statistically for the temperature range. When a parameter is specified as a function of VDD or

VCC it means their actual value at the moment of measurement.)

To meet these specifications, pin VCC should be decoupled to CGND using two 100 nF ceramic multilayer capacitors of

max. 350 m

Ω ESR. If V

CC slew rate is not critical, the capacitance value can be up to 400 nF. (See Figure 10).

Table 8.

Card supply voltage characteristics (continued)

Symbol

Parameter(1)

Test conditions

Min.

Typ.

Max.

Unit

Table 9.

Crystal connection (pins XTAL1 and XTAL2)

Symbol

Parameter(1)

Test conditions

Min.

Typ.

Max.

Unit

CXTAL1,2

External capacitance

on pins XTAL1,

XTAL2

Depends on type of crystal or resonator used

fXTAL

Crystal frequency

MHz

fXTAL1

Frequency applied on

pin XTAL1

MHz

VIH

High level input

voltage on pin XTAL1

0.7

VDD

+0.3

VIL

Low level input

voltage on pin XTAL1

-0.3

+0.3

VDD

VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are at TA = 25 °C.

Table 10.

Data lines (pins I/O, I/OUC, AUX1, AUX2, AUX1UC, and AUX2UC)

Symbol

Parameter(1)

Test conditions

Min.

Typ.

Max.

Unit

tD(I/O-I/OUC),

tD(I/OUC-I/O)

I/O to I/OUC, I/OUC

to I/O falling edge

delay

200

tPU

Active pull-up pulse

width

100

fI/O(MAX)

Maximum frequency

on data lines

MHz

Input capacitance on

data lines

VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are at TA = 25 °C.

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