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PIC16LF1906-ISOQTP 数据表(PDF) 75 Page - Microchip Technology

部件名 PIC16LF1906-ISOQTP
功能描述  28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology
PDF  288 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16LF1906-ISOQTP 数据表(HTML) 75 Page - Microchip Technology

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 2011 Microchip Technology Inc.
Preliminary
DS41569A-page 75
PIC16LF1904/6/7
7.6.4
PIR1 REGISTER
The PIR1 register contains the interrupt flag bits, as
shown in Register 7-4.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
software
should
ensure
the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
REGISTER 7-4:
PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
U-0
U-0
U-0
R/W-0/0
TMR1GIF
ADIF
RCIF
TXIF
—
—
—TMR1IF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
TMR1GIF:
Timer1 Gate Interrupt Flag bit
1
= Interrupt is pending
0
= Interrupt is not pending
bit 6
ADIF:
A/D Converter Interrupt Flag bit
1
= Interrupt is pending
0
= Interrupt is not pending
bit 5
RCIF:
USART Receive Interrupt Flag bit
1
= Interrupt is pending
0
= Interrupt is not pending
bit 4
TXIF:
USART Transmit Interrupt Flag bit
1
= Interrupt is pending
0
= Interrupt is not pending
bit 3-1
Unimplemented:
Read as ‘0’
bit 0
TMR1IF:
Timer1 Overflow Interrupt Flag bit
1
= Interrupt is pending
0
= Interrupt is not pending



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