LP61L1024

(August, 2002, Version 2.1)

4

AMIC Technology, Inc.

Truth Table

Mode

CE1

CE2

OE

WE

I/O Operation

Supply Current

Standby

H

X

X

X

High Z

X

L

X

X

High Z

Output Disable

L

H

H

H

High Z

Read

L

H

L

H

Write

L

H

X

L

Note: X = H or L

°C, f = 1.0MHz)

Symbol

Parameter

Min.

Max.

Unit

Conditions

Input Capacitance

8

pF

Input/Output Capacitance

10

pF

* These parameters are sampled and not 100% tested.

°C to +70°C, VCC = 3.3V + 10, GND = 0V)

Symbol

Parameter

LP61L1024-12

LP61L1024-15

Unit

Min.

Max.

Min.

Max.

Read Cycle

Read Cycle Time

12

-

15

-

ns

Address Access Time

-

12

-

15

ns

Chip Enable Access Time

CE1

-

12

-

15

ns

CE2

-

12

-

15

ns

Output Enable to Output Valid

-

7

-

9

ns

Chip Enable to Output in Low Z

CE1

3

-

5

-

ns

CE2

3

-

5

-

ns

Output Enable to Output in Low Z

2

-

2

-

ns

Chip Disable to Output in High Z

CE1

-

7

-

10

ns

CE2

-

7

-

10

ns

Output Disable to Output in High Z

2

7

2

9

ns

Output Hold from Address Change

3

-

5

-

ns