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LP61L1024 数据表(PDF) 6 Page - AMIC Technology

部件名 LP61L1024
功能描述  128K X 8 BIT 3.3V HIGH SPEED LOW VCC CMOS SRAM
PDF  16 Pages
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制造商  AMICC [AMIC Technology]
网页  http://www.amictechnology.com
标志 AMICC - AMIC Technology

LP61L1024 数据表(HTML) 6 Page - AMIC Technology

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LP61L1024
(August, 2002, Version 2.1)
5
AMIC Technology, Inc.
AC Characteristics (continued)
Symbol
Parameter
LP61L1024-12
LP61L1024-15
Unit
Min.
Max.
Min.
Max.
Write Cycle
tWC
Write Cycle Time
12
-
15
-
ns
tCW
Chip Enable to End of Write
10
-
12
-
ns
tAS
Address Setup Time of Write
0
-
0
-
ns
tAW
Address Valid to End of Write
10
-
12
-
ns
tWP
Write Pulse Width
8
-
10
-
ns
tWR
Write Recovery Time
0
-
0
-
ns
tWHZ
Write to Output in High Z
0
7
0
8
ns
tDW
Data to Write Time Overlap
8
-
10
-
ns
tDH
Data Hold from Write Time
0
-
0
-
ns
tOW
Output Active from End of Write
5
-
5
-
ns
Notes: tCHZ1, tCHZ2, tOHZ, and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
Timing Waveforms
Read Cycle 1
(1, 2, 4)
tRC
tOH
tAA
tOH
Address
DOUT



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