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APR6016 数据表(PDF) 19 Page - Aplus Intergrated Circuits

部件名 APR6016
功能描述  Voice Recording & Playback Device 16 Minute Duration
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  APLUS [Aplus Intergrated Circuits]
网页  http://www.aplusinc.com.tw
标志 APLUS - Aplus Intergrated Circuits

APR6016 数据表(HTML) 19 Page - Aplus Intergrated Circuits

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Preliminary
APR6016 Data Sheet
Voice Recording & Playback Device
Page 19
Revision 1.0
SPI clock high time
ThiSCLK
400
ns
Clock to rising edge of /CS
TrCS
200
ns
Fall of /CS to DO output
TfcsDO
200
ns
Fall of SCLK to data out valid
TfSCLK
1000
ns
Rise of /CS to DO high Z
ThzDO
500
ns
Period SPI clock for DIG_READ,
write
DTpSCLK
@4kHz Internal sample clock
@8kHz Internal sample clock
External sample clock
500
uS
250
uS
Equation 1
S
First SET_REC command to start
recording
Tarec
@4kHz Internal sample clock
@8kHz Internal sample clock
External sample clock
376
188
Equation 2
ms
ms
S
Rise of SAC after STOP Com-
mand to end of recording
TSarec
@4kHz Internal sample clock
@8kHz Internal sample clock
External sample clock
658
329
Equation 2
ms
ms
S
First SET_PLAY command to
audio output
Taplay
@4kHz Internal sample clock
@8kHz Internal sample clock
External sample clock
658
329
Equation 9
ms
ms
S
STOP after SET_PLAY or PLAY
to end of audio output
TSaplay
@4kHz Internal sample clock
@8kHz Internal sample clock
External sample clock
376
188
Equation 2
ms
ms
S
SAC period
TpSAC
REC, PLAY @4kHz
REC, PLAY @8kHz
REC, PLAY EXTCLK
FWD @4kHz
FWD @8kHz
FWD @ EXTCLK
752
376
Equation 3
2
1
Equation 4
ms
ms
ms
ms
S
SAC low time
TloSAC
REC, PLAY @4kHz
REC, PLAY @8kHz
REC, PLAY EXTCLK
FWD @4kHz
FWD @8kHz
FWD @ EXTCLK
94
47
Equation 5
0.25
0.125
Equation 6
ms
ms
ms
ms
S
See Figure 6 and Table 1
Tnext1
5
uS
See Figure 6 and Table 1
Tnext2
m
S
5
See Figure 6 and Table 1
Tnext3
@4kHz Internal sample clock
@8kHz Internal sample clock
External sample clock
752
376
Equation 3
ms
ms
S
Item
Symbol
Condition
Min
Typ
Max
Unit



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