ADA4841-1/ADA4841-2

Rev. E | Page 16 of 20

The POWER DOWN pin is protected with ESD clamps,

as shown in

. Voltages beyond the power supplies

cause these diodes to conduct. The guidelines for limiting the

overload current in the input protection section should also be

followed for the

Figure 48

POWER DOWN pin.

POWER-DOWN OPERATION

Figure 48 shows the ADA4841-1 power-down circuitry. If the

POWER DOWN pin is left unconnected, then the base of the

input PNP transistor is pulled high through the internal pull-up

resistor to the positive supply, and the part is turned on. Pulling

the POWER DOWN pin approximately 1.7 V below the positive

supply turns the part off, reducing the supply current to

approximately 40 μA.

VCC

VEE

POWER DOWN

ESD

ESD

TO

AMPLIFIER

BIAS

Figure 48. POWER DOWN Circuit