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AS1334

Datasheet - Detailed Descr i pti on

8.2 Internal Synchronous Rectifier

To reduce the rectifier forward voltage drop and the associated power loss, the AS1334 uses an internal NFET as a synchronous rectifier. The

big advantage of a synchronous rectification is the higher efficiency in a condition where the output voltage is low compared to the voltage drop

across an ordinary rectifier diode. During the inductor current down slope in the second part of each cycle the synchronous rectifier is turned on.

Before the next cycle the synchronous rectifier is turned off.

There is no need for an external diode because the NFET is conducting through its intrinsic body diode during the transient intervals before it

turns on.

8.3 Power-OK

The POK output indicates if the output voltage is within 90% of the nominal voltage level. As long as the output voltage is within regulation the

open-drain POK output sinks current.

8.4 Shutdown Mode

If EN is set to high (>1.2V) the AS1334 is in normal operation mode. During power-up and when the power supply is less than 2.7V minimum

operating voltage, the chip should be turned off by setting EN low. In shutdown mode the following blocks of the AS1334 are turned off, PFET

switch, NFET synchronous rectifier, reference voltage source, control and bias circuitry. The AS1334 is designed for compact portable

applications, such as mobile phones where the system controller controls operation mode for maximizing battery life and requirements for small

package size outweigh the additional size required for inclusion of UVLO (Under Voltage Lock-Out) circuitry.

Note:

Setting the EN digital pin low (<0.5V) places the AS1334 in a 0.01µA (typ) shutdown mode.

8.5 Thermal Overload Protection

To prevent the AS1334 from short-term misuse and overload conditions the chip includes a thermal overload protection. To block the normal

operation mode the device is turning the PFET and the NFET off in PWM mode as soon as the junction temperature exceeds 150°C. To resume

normal operation the temperature has to drop below 140°C.

Note:

Continuing operation in thermal overload conditions may damage the device and is considered bad practice.

8.6 Current Limiting For Protection

If in the PWM mode the cycle-by-cycle current limit of 1200mA (max.) is reached the current limit feature takes place and protects the device and

the external components. A timed current limiting mode is working when a load pulls the output voltage down to approximately 0.375V. In this

timed current limit mode the inductor current is forced to ramp down to a safe value. This is achieved by turning off the internal PFET switch and

delaying the start of the next cycle for 3.5us. The synchronous rectifier is also turned off in the timed current limit mode.

The advantage of the timed current limit mode is to prevent the device from the loss of the current control.