AS3543 datasheet(46/92 Pages) AMSCO

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AS3543 3v2

Data Sheet - D e t a i l e d D e s c r i p t i o n - S Y S T E M F u n c t i o n s

10.1.5 Register Description

10.2

Hibernation

10.2.1 General

Hibernation allows shutting down a part or the complete system. Hibernation can be terminated by every possible

interrupt of the AFE. E.g. one can use the RTC for a time triggered wake-up. The interrupt has to be enabled before

going to hibernation.:

10.2.2 Register Description

Table 31. System Related Register

Name

Base

Offset

Description

Out_Cntr1

2-wire serial

1A-1h

Control of PWGD and XRES signal and drive

In_Cntr

2-wire serial

1A-4h

Selection of HBT input pin

PMU_Enable

2-wire serial

1Ch

Enables writings to extended registers 1Ah-1 and 1Ah-5

SYSTEM

2-wire serial

20h

Watchdog and Over-temperature control, Power down enable

SUPERVISOR

2-wire serial

21h

Set emergency shutdown time

IRQENRD_0

2-wire serial

23h

Enable/disable PMU interrupts

IRQENRD_1

2-wire serial

24h

Enable/disable wake-up, voice and PMU interrupts

IRQENRD_2

2-wire serial

25h

Enable/disable charger, USB and supervisor interrupts

IRQENRD_3

2-wire serial

26h

Enable/disable junction temperature interrupt

Table 32. Hibernation

State

Description

Enter

To enter hibernation mode the following settings have to be done:

- Enable just these IRQ sources which should lead to leave hibernation mode.

- Make sure that IRQ is inactive (IRQ flags get cleared by Reg0x23-27 readings.

- Define which regulators should be kept powered and enter hibernation by writing to Reg

1Ch_0x06 + Reg 17h_0xXX

Note that hibernation will shutdown regulators which are not in the keep list of the mentioned

Reg 17h writing and which are powered by the selected power-up sequence.

(e.g. PVDD2 will not go hibernation with VPRG3 is vss or vdd)

Hibernation

VDD27 chip supply is kept ON

All other regulators are switched OFF dependent on the KEEP-Bits

XRES goes active and PWGD goes inactive.

Leave

The chip will come out of Hibernation with IRQ activation.

Start-Up sequence is provided defined by the VPRG state latched on the previous Start-Up.

(VPRG state does not get latched again by leaving hibernation)

Table 33. Hibernation Related Register

Name

Base

Offset

Description

Hibernation

2-wire serial

17h-6

Hibernation control

PMU_Enable

2-wire serial

1Ch

Enables writings to extended register 17h-6

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