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AS5048A/AS5048B

Magnetic Rotary Encoder

14-bit Angular Position Sensor

Datasheet

4.2

SPI Interface

The 16 bit SPI Interface enables read / write access to the register blocks and is compatible to a standard micro controller

interface. The SPI is active as soon as CSn is pulled low. The AS5048A then reads the digital value on the MOSI(master out

slave in) input with every falling edge of CLK and writes on its MISO (master in slave out) output with the rising edge. After 16

clock cycles CSn has to be set back to a high status in order to reset some parts of the interface core.

4.2.1

SPI Interface Signals (4-Wire Mode, Wire_mode = 1)

The AS5048A only supports slave operation mode. Therefore CLK for the communication as well as the CSn signal has to be

provided by the test equipment. The following picture shows a basic interconnection diagram with one master and an AS5048A

device and a principle schematic of the interface core.

Figure 3 SPI Connection AS5 048A with uC

Because the interface has to decode the sent command before it can react and provide data the response of the chip to a

specific command applied at a time T can be accessed in the next transmission cycle ending at T + TCOM.

The data are sent and read with MSB first. Every time the chip is accessed it is sending and receiving data.

Figure 4 SPI Comm and/Re sponse Data Flow