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AS5311 数据表(PDF) 9 Page - ams AG |
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AS5311 数据表(HTML) 9 Page - ams AG |
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9 / 29 page ![]() www.ams.com/AS5311 Revision 1.12 9 - 29 AS5311 Datasheet - E le c t r i ca l C h a ra c t e r is t i c s 6.5 Timing Characteristics 6.5.1 Pulse Width Modulation Output Table 10. Synchronous Serial Interface (SSI) Symbol Parameter Note Min Typ Max Units tDOactive Data output activated (logic high) Time between falling edge of CSn and data output activated 100 ns tCLKFE First data shifted to output register Time between falling edge of CSn and first falling edge of CLK 500 ns TCLK / 2 Start of data output Rising edge of CLK shifts out one bit at a time 500 ns tDOvalid Data output valid Time between rising edge of CLK and data output valid 413 ns tDOtristate Data output tristate After the last bit DO changes back to “tristate” 100 ns tCSn Pulse width of CSn CSn = high; To initiate read-out of next angular position 500 ns fCLK Read-out frequency Clock frequency to read out serial data >0 1 MHz Table 11. Pulse Width Modulation Output Symbol Parameter Note Min Typ Max Units f PWM PWM frequency Signal period = 4098µs ±5% at TAMB = 25°C 232 244 256 Hz Signal period = 4098µs ±10% at TAMB = -40 to +125°C 220 244 268 PW MIN Minimum pulse width Position 0d = 0µm 0.9 1 1.1 µs PW MAX Maximum pulse width Position 4095d = 1999.5µm 3892 4097 4301 µs |
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