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AS8220 数据表(PDF) 13 Page - ams AG |
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AS8220 数据表(HTML) 13 Page - ams AG |
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13 / 34 page ![]() www.austriamicrosystems.com Revision 17920-001-10a 12 - 33 AS8220A Objective Data Sheet - Detailed Description 8 Detailed Description The AS8220A is a high-speed fault tolerant device operating as an interface between a generic controller and the copper wire physical bus. The AS8220A is designed to extend the application range for high speed and safety critical time triggered bus systems in an automotive environment. The drivers are short circuit protected against the positive and negative supply voltage to increase the robustness and reliability of automotive systems. The AS8220A operates at baudrates up to 10 Mbps to increase the bandwidth for automotive applications. Block Description The electrical AS8220A high-speed bus-system transceiver is the interface between a FlexRay™ network node module and the channel. The transceiver provides differential transmit and receive capability to the bus, allowing the node module bidirectional time multiplexed binary data stream transfer. Besides the transmit and receive function, the transceiver provides low power management, supply voltage monitoring (under voltage detection) as well as bus failure detection and represents a ESD-protection barrier between the bus and the ECU. The AS8220A consists of 8 different functional blocks (see Figure 1): Table 4. Functional Blocks Functional Block Short Description Events Transitions in order to change between the operation modes are possible only when events are detected. The device supports two type of events, events on the host controller interface (STBN) and detection of undervoltage or supply voltage recovery. Whenever an event is recognized, a transition can be performed. Operating Modes The AS8220A provides the following operating modes: NORMAL: non low power mode STANDBY: low power mode Host Controller Interface (HCI) Digital interface between the transceiver and the host controller (HC) The host interface comprises the read out handler, which delivers failure and status information via the ERRN pin to the host controller. Communication Controller Interface (CCI) Digital interface between the transceiver and the FlexRay communication controller (CC) Bus Guarding Interface (BGI) Digital interface between the transceiver and the FlexRay bus guardian (BG) Power Supply Interface (PSI) The power supply interface consists of an sub functional block, the voltage monitor (VM) and includes two analogue inhibit outputs for signalling the internal state of the transceiver Internal Logic (IL) The digital signals from the functional blocks of the device are fed into the internal logic where the forwarding of FlexRay messages from analogue side to digital interfaces and vice versa is done. The state machine is performed in this block and is dealing the error, wake and power-on flags. Bus Failure Detector (BFD) Temperature Protection (TP) The bus failure detector is directly connected to the bus pins, in order to detect several external failure conditions which may occur on the bus. The temperature protection turns off the output driver when reaching the specified internal temperature in order to protect the device. Transmitter The transmitter provides the bus signals as specified on the bus lines. Receiver The receiver captures FlexRay valid signals on the bus lines and provides received data streams to the internal logic |
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