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AS8220 数据表(PDF) 30 Page - ams AG |
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AS8220 数据表(HTML) 30 Page - ams AG |
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30 / 34 page ![]() www.austriamicrosystems.com Revision 17920-001-10a 29 - 33 AS8220A Objective Data Sheet - Appendix VTxDIL Threshold for detecting TxD as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ITxDIH TxD high level input current - - ITxDIL TxD low level input current - - VTxENIH Threshold for detecting TxEN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VTXENIL Threshold for detecting TxEN as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ITxENIH TxEN high level input current - - ITxENIL TxEN low level input current - - VRxDOH RxD high level output voltage uVIO-OUT-HIGH Output voltage on a digital output, when in logical high state VRxDOL RxD low level output voltage uVIO-OUT-LOW Output voltage on a digital output, when in logical low state Host Interface VSTBNIH Threshold for detecting STBN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VSTBNIL Threshold for detecting STBN as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ISTBNIH STBN high level input current - - ISTBNIL STBN low level input current - - tSTBN_DEB_LP STBN de-bouncing time low power modes -- tSTBN_DEB_NLP STBN de-bouncing time non low power modes -- VERRNOH ERRN high level output voltage uVIO-OUT-HIGH Output voltage on a digital output, when in logical high state VERRNOL ERRN low level output voltage uVIO-OUT-LOW Output voltage on a digital output, when in logical low state Bus Guardian Interface VBGEIH Threshold for detecting BGE as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high Table 10. Comparison table AS8220A Datasheet FlexRay Electrical Physical Layer Specification V2.1 RevB Symbol Parameter Name Description |
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