Data Sheet

SSM2220

Rev. C | Page 11 of 12

by consulting Figure 15. Typical output impedance levels approach

the performance of a perfect current source.

MΩ

1

μMho

0

.

1

1

=

Q2 and Q3 are in series and operate at the same current level;

therefore, the total output impedance is as follows:

Current Matching

The objective of current source or mirror design is generation

of currents that either are matched or must maintain a constant

ratio. However, mismatch of base emitter voltages causes output

current errors. Consider the example of Figure 21.

R1

R2

R1 = R2 = R

A CLOSELY MATCHED

TRANSISTOR PAIR

–

+

2

2

Figure 21. Current Matching Circuit

If the resistors and transistors are equal and the collector

voltages are the same, then the collector currents match precisely.

Investigating the current matching errors resulting from a nonzero

Figure 22 describes the relationship of current matching errors

because the relative error between the currents is exponentially

proportional to the offset voltage, tight matching is required to

design high accuracy current sources. For example, if the offset

voltage were 5 mV at 100 μA collector current, the current match-

ing error would be 20%. Additionally, temperature effects, such

Q1 and Q2 are not well matched.

1.2

1.0

0.8

0.6

0.4

0.2

0

0.001

10

1

0.1

0.01

PERFORMANCE

R = 3kΩ

2

Figure 22. Current Matching Accuracy vs. Offset Voltage