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T89C51RD2-3CWC-M 数据表(PDF) 46 Page - ATMEL Corporation |
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T89C51RD2-3CWC-M 数据表(HTML) 46 Page - ATMEL Corporation |
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46 / 86 page ![]() Rev. F - 15 February, 2001 46 T89C51RD2 6.12. Reduced EMI Mode The ALE signal is used to demultiplex address and data buses on port 0 when used with external program or data memory. Nevertheless, during internal code execution, ALE signal is still generated. In order to reduce EMI, ALE signal can be disabled by setting AO bit. The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no longer output but remains active during MOVX and MOVC instructions and external fetches. During ALE disabling, ALE pin is weakly pulled high. Table 24. AUXR Register AUXR - Auxiliary Register (8Eh) Reset Value = XX0X 1000b Not bit addressable 7 6 5 4 3 2 1 0 - - M0 - XRS1 XRS0 EXTRAM AO Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 - Reserved The value read from this bit is indeterminate. Do not set this bit. 5 M0 M0 bit: Pulse length in clock period Stretch MOVX control: the RD/ and the WR/ pulse length is increased according to the value of M0. see table 6 4 - Reserved The value read from this bit is indeterminate. Do not set this bit. 3 XRS1 XRS1 bit XRAM size: Accessible size of the XRAM. See Table 6. 2 XRS0 XRS0 bit XRAM size: Accessible size of the XRAM. Table 6. 1 EXTRAM EXTRAM bit See Table 6. 0 AO ALE Output bit Clear to restore ALE operation during internal fetches. Set to disable ALE operation during internal fetches. |
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