CALIFORNIA MICRO DEVICES

©2000 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation.

12/5/2000

7

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www.calmicro.com

CMPWR160

V

Figure 8 shows the output response of the regulator

during a complete power down situation under full load

Figure 8. V

Shutdown Transient Response

pin is shown in Figure 9. The graph shows that a rising

edge disables the regulator.

The rise and fall time for the output voltages are 100µs

and 200µs respectively.

Figure 9. Shutdown Transient Response

3.50V

(500mA Load)

VCC

VOUT

M 2.00ms

1.00V

Ch2 1.00V

25.0kS/s

Tek Run

Sample

Ch2

3.0V

(500mA Load)

SD

M 200µs

1.00V

Ch2

2

5.00V

25.0kS/s

Tek

3 Acqs

Ch2

VOUT

POR

Response

The transient response of the active low POR pin to V

OUT

is shown in Figure 10. When V

to logic low (0V). The pin remains at logic low for 30ms

then it is forced to logic high (3.3V). If V

will remain logic low. If it falls below the voltage threshold

and then recovers the 30ms time will reset.

When V

immediately forced to logic low.

V

work without V

2.90V

POR

M 10.0ms

1.00V

Ch2

2

200mV

5.0kS/s

Tek Run

Sample

Ch2

VOUT

2.7V

3.1V