L6717 datasheet(49/56 Pages) STMICROELECTRONICS

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L6717

System control loop compensation

Doc ID 17326 Rev 1

49/56

System control loop compensation

The device embeds two separate and independent control loops for CORE and NB section.

The control loop for NB section is a simple voltage-mode control loop with (optional) voltage

positioning featured when DROOP pin is shorted with FB. The control loop for the CORE

section also features a current-sharing loop to equalize the current carried by each of the

configured phases.

The CORE control system can be modeled with an equivalent single-phase converter

whose only difference is the equivalent inductor L/N (where each phase has an L inductor

and N is the number of the configured phases). See Figure 17.

Figure 17.

Equivalent control loop for NB and CORE sections

This means that the same analysis can be used for both the sections with the only exception

of the different equivalent inductor value (L=LNB for NB section and L=LCORE/N for the

CORE section) and the current reading gain (DCR/RG_NB for NB Section and DCR/RG for

the CORE section).

The control loop gain results (obtained opening the loop after the COMP pin):

Where:

●

RLL is the equivalent output resistance determined by the droop function;

●

ZP(s) is the impedance resulting by the parallel of the output capacitor (and its ESR)

and the applied load RO;

●

ZF(s) is the compensation network impedance;

●

ZL(s) is the equivalent inductor impedance;

●

A(s) is the error amplifier gain;

●

is the PWM transfer function.

The control loop gain for each section is designed in order to obtain a high DC gain to

minimize static error and to cross the 0dB axes with a constant -20 dB/Dec. slope with the

desired crossover frequency

T. Neglecting the effect of ZF(s), the transfer function has one

zero and two poles; both the poles are fixed once the output filter is designed (LC filter

resonance

LC) and the zero (ωESR) is fixed by ESR and the droop resistance.

Ref

NB_COMP

RF_NB CF_NB

RFB_NB

PWM

LNB

ESR_NB

CO_NB

d VNB_COMP

VOUT_NB

ZF(s)

ZFB(s)

VID_NB

Ref

COMP

RFB

PWM

LCORE/N

ESR

d VCOMP

VOUT

ZF(s)

ZFB(s)

VID_CORE

NB_FB

LOOP s

()

PWM Z

F s

() R

P s

()

⋅⋅

P s

() Z

L s

()

[]

F s

()

--------------

()

------------

⎝⎠

⎛⎞

⋅

-------------------------------------------------------------------------------------------------------------------

–

PWM

---

ΔV

OSC

-------------------

⋅

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