DS1682

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Over bit is set to a 1 the first time that the 2 byte Event Counter reaches FFh and rolls over to 00h. Once

the Event Roll Over bit is set to a 1 and the Event Counter reaches FFh, event counting will stop and the

event counter will not roll over to 00h again. This value is not erasable when the Reset Enable and the

AoR bits in the Configuration register are set to a zero and does not require a power source to maintain

the contents to insure the data’s integrity. This register can only be cleared when the Reset Enable bit is

set to a one or the AoR bit is set to a 1 and the Alarm# pin is held high, and the Reset command is sent

via the 2-wire bus.

RESET COMMAND

The DS1682 can only be reset when the Reset Enable bit is set to a one or the AoR bit is set to a one with

the Alarm# pin held high, and the Reset command is sent via the 2-wire bus by writing 55h into memory

location 1Dh. With the Reset Enable bit set to a 0, the AoR bit set to a 0 or the AoR bit set to a 1 and the

Alarm# pin held low, the Reset command is ignored by the DS1682. With the Write Disable flag set to a

1, the contents of the Alarm Trip Point and the Configuration register that are protected/locked by this bit

can not be written to or erased, even if the Reset Enable bit is set to a 1. The Reset command when the

Reset Enable bit is set to a one or the AoR bit set to a 1 and Alarm# held high, will erase the contents of

the Elapsed Time Counter, Total Time Accumulator, and Event Counter. The Reset Command will

always read 0 if the memory location is read by the user.

CONFIGURATION REGISTER

MSb

LSb

AoR

AF

WDF

WMDF

AOS

RE

AP

ERO

AoR – Alarm or Reset Enable - The Alarm or Reset Enable bit maps either the Alarm output or the Reset

Enable Input to the Alarm# pin. With the AoR bit set to a zero, the Alarm output will be mapped to the

Alarm# pin. When the AoR bit is set to a one, the Reset Enable input will be mapped to the Alarm# pin.

The standard factory setting for the AoR bit is 0. The Reset Enable input is OR’ed with the RE bit and

will perform the same function only from outside the device.

The Reset Enable input, if pulled high, will allow the D1682 to accept the Reset command via the 2-wire

bus to clear the Total Time Accumulator and Event Counter. If the Reset Enable input is pulled low, the

DS1682 will not respond to the 2-wire command to reset the Total Time Accumulator register or the

Event Counter to zero. This input allows the designer to permanently enable the reset function, enable

the function during the manufacturing process and then disable it, or turn it on and off when the

authorized repair person has completed repairing or calibrating the equipment. There is no security

provided to this pin to prevent someone from enabling the reset function at any time by pulling the pin

high. The security will have to be provided by the system and/or enclosure, if required. If a switch or

button is used to Configuration the Reset Enable input, a debounce capacitor should be used to prevent

spikes on the input.

AF – Alarm Flag - The Alarm Flag is set to a 1 when the Alarm# output is activated. If the Alarm# pin

is not activated or enabled, the Alarm Flag will be set to a 0. This bit can be cleared by the reset

command, but will be set again at the end of the next event in which the ETC and ATP values cause the

Alarm# pin to be enabled or activated. This bit can not be written by the user.

WDF – Write Disable Flag – When the Write Disable Command is written to AAh twice at memory

location 1Eh, the WDF will be set to a 1 and can not be cleared or reset. When the WDF is set to a 1, the

Alarm Trip Point and Configuration register are read-only. The Total Time Accumulator, Elapsed Time

Counter, and Event Counter will also be read only if the Reset Enable and AoR bits are set to a 0. When