SAP5S / SAP51

Universal Actuator-Sensor Interface IC

Data Sheet

July 17, 2012

© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 3.1

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

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Table 6: SAP5 Master Calls and Related Slave Responses

Master Request

Slave Response

Instruction

MNE

ST

CB

A4

A3

A2

A1

A0

I4

I3

I2

I1

I0

PB

EB

SB

I3

I2

I1

I0

PB

EB

Data Exchange

DEXG

0

0

A4

A3

A2

A1

A0

0

D3

~Sel

D2

D1

D0

PB

1

0

D3

D2

D1

D0

PB

1

Write Parameter

WPAR

0

0

A4

A3

A2

A1

A0

1

P3

~Sel

P2

P1

P0

PB

1

0

P3

P2

P1

P0

PB

1

Address Assignment ADRA

00

0000

0

A4

A3

A2

A1

A0

PB

1

00

1

1001

Write Extented ID

Code_1

WID1

01

0000

0

0

ID3

ID2

ID1

ID0

PB

1

00

0

0001

Delete Address

DELA

01

A4

A3

A2

A1

A0

0

0 Sel

000

PB

1

00

0

0001

Reset Slave

RES

0

1

A4A3A2

A1

A0

1

1

~Sel

100

PB

1

00

1

1001

Read IO

Configuration

RDIO

0

1

A4

A3

A2

A1

A0

1

0

Sel

0

0

0

PB

1

0

IO3

IO2

IO1

IO0

PB

1

Read ID Code

RDID

0

1

A4

A3

A2

A1

A0

1

0

Sel

0

0

1

PB

1

0

ID3

ID2

ID1

ID0

PB

1

Read ID Code_1

RID1

0

1

A4

A3

A2

A1

A0

1

0

Sel

0

1

0

PB

1

0

ID3

ID2

ID1

ID0

PB

1

Read ID Code_2

RID2

0

1

A4

A3

A2

A1

A0

1

0

Sel

0

1

1

PB

1

0

ID3

ID2

ID1

ID0

PB

1

Read Status

RDST

0

1

A4

A3

A2

A1

A0

1

1

~Sel

1

1

0

PB

1

0

S3

S2

S1

S0

PB

1

Broadcast (Reset)

BR01

01

1111

1

10

1011

1

--- no slave response ---

NOTE: In extended address mode the "Select Bit" defines whether the A-Slave or B-Slave is being addressed. Dependent on the type of master call the I3 bit

carries the select bit information (Sel) or the inverted select bit information (~Sel). The extended address mode can not be activated, as long as the E²PROM

flag Lock_EE_PRG is at logic LOW level. Refer to chapter 3.3 on page 25 for programming the Lock_EE_PRG flag

.