Micrel, Inc.

MICRF219A

July 2011

14

M9999-071811-A

RadioTech@micrel.com

D8

D7

Set number of consecutive valid

bits before releasing DO

0

0

0 bit - default

0

1

4

1

0

8

1

1

16

or (408) 944-0800

D6

D5

Set slice level

0

1

Slice Level 30%

1

0

Slice Level 40%

1

1

Slice Level 50%

- default

0

0

Slice Level 60%

D4

D3

Demod Bandwidth (at 433.92MHz)

0

0

1625Hz

0

1

3250Hz

1

0

6500Hz

1

1

13000Hz

- default

D0

D1

D2

Desense*

0

X

X

No Desense - default

1

0

0

6dB Desense

1

1

0

16dB Desense

1

0

1

30dB Desense

1

1

1

42dB Desense

* In desense mode, a fixed gain control voltage is applied to the mixer

and variable gain amplifier, and the automatic gain adjustment loop is

disabled.

Programming the device is accomplished by the use of

pins DO and SCLK. Normally, DO (Pin 10) is outputting

data and needs to switch to an input pin made by the

start sequence, as shown at Figure 7.

High at the SCLK pin tri-states the DO pin, enabling the

external drive into the DO pin with an initial low level.

The start sequence is completed by taking SCLK low,

then high while DO is low, followed by taking DO high,

then low while SCLK is high. The serial interface is

initialized and ready to receive the programming data.

SCLK frequency should be greater than 5KHz to avoid

automatic reset from internal circuitry.

Figure 7. Serial Interface Start Sequence

Bits are serially programmed starting with the most

significant bit (MSB = D19) if all bits are being

programmed until the least significant bit (LSB =D0) For

instance, if only the desense bits D0, D1, and D2 are

being programmed, then these are the only bits that

need to be programmed with the start sequence, D2, D1,

D0, plus the stop sequence. Or, if only the squelch bit

D17 is needed, then the sequence must be from start

sequence, D17 through D0 plus the stop sequence,

making sure the other bits (besides D17) are

programmed as needed. It is recommended that all

parallel input pins (SEL0, SEL1, and SQ) be kept high

when using the serial interface. After the programming

bits are finished, a stop sequence (as shown in Figure 8)

is required to end the mode and re-establish the DO pin

as an output again. To do so, the SCLK pin is kept high

while the DO pin changes from low to high, then low

again, followed by the SCLK pin made low. Timing of the

programming bits are not critical, but should be kept as

shown below:

T1 < 0.1 us, Time from SCLK to convert DO to

input pin

T6 > 0.1 us, SCLK high time

T7 > 0.1 us, SCLK low time

T2, T3, T4, T5, T8, T9, T10 > 0.1 us

Figure 8. Serial Interface Stop Sequence