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ACT5880 数据表(PDF) 35 Page - Active-Semi, Inc |
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ACT5880 数据表(HTML) 35 Page - Active-Semi, Inc |
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35 / 87 page ![]() ACT5880 Rev 2, 03-Sep-13 - 35 - www.active-semi.com ActivePMU TM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. Copyright © 2013 Active-Semi, Inc. Active-Semi Confidential―Do Not Copy or Distribute REGISTER AND BIT DESCRIPTIONS CONT’D BLOCK ADDRESS and BIT NAME DEFAULT and ACCESS DESCRIPTION CHG 0xD1 7 SUSCHG 0 W/R Set 1 to force the charger into suspend state. Set 0 to allow charging. 6 ENVISET 0 W/R Set 1 to enable the changes to charger voltage and current settings. 5 TOTTIMO[1] 0 W/R Entire cycle safe timer time-out setting. [1:0]=00 for 180 minutes, 01 for 240 minutes, 10 for 300 minutes and 11 for no time-out. 4 TOTTIMO[0] 0 W/R Entire cycle safe timer time-out setting. [1:0]=00 for 180 minutes, 01 for 240 minutes, 10 for 300 minutes and 11 for no time-out. 3 PRETIMO[1] 0 W/R Pre-condition safe timer time-out setting. [1:0]=00 for 40 minutes, 01 for 60 minutes, 10 for 80 minutes and 11 for no time-out. 2 PRETIMO[0] 0 W/R Pre-condition safe timer time-out setting. [1:0]=00 for 40 minutes, 01 for 60 minutes, 10 for 80 minutes and 11 for no time-out. 1 OVPSET[1] 1 W/R Over-voltage thresholds setting, [1:0]=00 for 6.3V, 01 for 6.5V, 10 for 6.7V and 11 for 6.9V. 0 OVPSET[0] 0 W/R Over-voltage thresholds setting, [1:0]=00 for 6.3V, 01 for 6.5V, 10 for 6.7V and 11 for 6.9V. 0xD8 7 TIMR_STAT 0 W/R Charge Time-out Interrupt Flag/Mask. Write this bit with TIMR_PRE[ ] and/or TIMR_TOT[ ] to 1 to allow interrupt when charge safety timers expire. Read this bit to get charge time-out interrupt status, read back value is 1 when interrupt is generated and it is automatically cleared to 0 upon reading, read back value is 0 when no interrupt is generated. Also see TIMR_DAT[ ], TIMR_PRE[ ] and TIMR_TOT[ ]. 6 TEMP_STAT or BATT_STAT 0 W/R Battery Temperature or Battery Installation Detection Interrupt Flag/ Mask. Write this bit with TEMP_POS[ ] (BATT_POS[ ]) or/and TEMP_NEG[ ] (BATT_NEG[ ]) to 1 to allow interrupt when a battery temperature event occurs or a battery installation event occurs. Read this bit to get the battery temperature or battery installation detection Interrupt status, read back value is 1 when interrupt is generated and it is automatically cleared to 0 upon reading, read back value is 0 when no interrupt is generated. Also see TEMP_DAT[ ], BATT_DAT[ ], TEMP_POS[ ], TEMP_NEG[ ], BATT_POS[ ] and BATT_NEG[ ]. 5 INPUT_STAT 0 W/R Input Voltage Interrupt Flag/Mask. Write this bit with INPUT_POS[ ] or/ and INPUT_NEG[ ] to 1 to allow interrupt when CHGIN UVLO or OVP condition occurs. Read this bit to get input voltage interrupt status, read back value is 1 when interrupt is generated and it is automatically cleared to 0 upon reading, read back value is 0 when no interrupt is generated. Also see INPUT_DAT[ ], INPUT_POS[ ] and INPUT_NEG[ ]. 4 CHG_STAT 0 W/R Charge State Interrupt Flag/Mask. Write this bit with CHG_POS[ ] or/and CHG_NEG[ ] to 1 to allow interrupt when the state machine gets in or out of EOC state. Read this bit to get the EOC state interrupt status, read back value is 1 when interrupt is generated and it is automatically cleared to 0 upon reading, read back value is 0 when no interrupt is generated. Also see CHG_DAT[ ], CHG_POS[ ] and CHG_NEG[ ]. 3 TIMR_DAT 0 R Charge Timer Status. Value is 1 when precondition time-out or total charge time-out occurs. Value is 0 in other cases. 2 TEMP_DAT or BATT_DAT 0 R Temperature or Battery Installation Status. Value is 1 when battery temperature is inside of valid range or battery installation is detected. Value is 0 in other cases. 1 INPUT_DAT 0 R Input Voltage Detection Status. Value is 1 when CHGIN voltage is valid, value is 0 when CHGIN voltage is not valid. The valid range is VUVLO<VCHGIN<VOVP. 0 CHG_DAT 0 R Charge State Machine Status. Value is 1 when the charger state machine is in EOC state. Value is 0 in other cases. Note: W/R: Write and read accessible. R: Read accessible, writing to the bit does not make change to the volume. |
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