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ACT5880 数据表(PDF) 13 Page - Active-Semi, Inc

部件名 ACT5880
功能描述  15 Channels Advanced PMU for Smart Phone
PDF  87 Pages
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制造商  ACTIVE-SEMI [Active-Semi, Inc]
网页  http://www.active-semi.com
标志 ACTIVE-SEMI - Active-Semi, Inc

ACT5880 数据表(HTML) 13 Page - Active-Semi, Inc

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ACT5880
Rev 2, 03-Sep-13
- 13 -
www.active-semi.com
ActivePMU
TM and ActivePathTM are trademarks of Active-Semi.
I2CTM is a trademark of NXP.
Copyright © 2013 Active-Semi, Inc.
Active-Semi Confidential―Do Not Copy or Distribute
FUNCTION
BLOCK
ADDR.
BITS NAMES AND DEFAULTS
D7
D6
D5
D4
D3
D2
D1
D0
SYS
0x00
TRST
nSYSMODE nSYSLVMSK nSYSSTAT
SYSLEV[3]
SYSLEV[2]
SYSLEV[1]
SYSLEV[0]
0
0
0
R
0
0
0
0
SYS
0x01
EVENT1
EVENT2
EVENT4
RFU
SCRATCH[3] SCRATCH[2] SCRATCH[1] SCRATCH[0]
0
0
0
0
x
x
x
x
SYS
0x3C Set to 0x80 before setting nWKALM and RAAI.
SYS
0x3D Set to 0x08 before setting nWKALM and RAAI.
SYS
0x6C
RFU
RFU
STB
STA
RFU
RFU
DATAB
DATAA
x
x
0
1
x
x
0
0
SYS
0x6D
RFU
RFU
POSB
POSA
RFU
RFU
NEGB
RFU
x
x
0
1
x
x
0
x
REG1
0x10
x
x
VSET0[5]
VSET0[4]
VSET0[3]
VSET0[2]
VSET0[1]
VSET0[0]
0
0
0
1
1
0
0
0
REG1
0x11
x
x
VSET1[5]
VSET1[4]
VSET1[3]
VSET1[2]
VSET1[1]
VSET1[0]
0
0
0
1
1
0
0
0
REG1
0x12
ON
PHASE
MODE
DELAY[2]
DELAY[1]
DELAY[0]
nFLTMSK
OK
1
0
0
0
0
0
0
R
REG2
0x20
x
x
VSET[5]
VSET[4]
VSET[3]
VSET[2]
VSET[1]
VSET[0]
0
0
1
0
0
1
0
0
REG2
0x22
ON
PHASE
MODE
DELAY[2]
DELAY[1]
DELAY[0]
nFLTMSK
OK
1
1
0
0
0
0
0
R
REG2
0x28
x
x
VSET[5]
VSET[4]
VSET[3]
VSET[2]
VSET[1]
VSET[0]
0
0
1
0
0
1
0
0
REG2
0x29
x
x
LOWIQ
x
x
x
nFLTMSK
OK
1
0
1
0
0
0
0
R
REG3
0x30
VSET[7]
VSET[6]
VSET[5]
VSET[4]
VSET[3]
VSET[2]
VSET[1]
VSET[0]
0
1
0
1
0
1
0
0
REG3
0x31
ON
PHASE
RFU
DELAY[2]
DELAY[1]
DELAY[0]
nFLTMSK
OK
0
0
0
0
0
0
0
R
REG4
0x40
x
x
VSET[5]
VSET[4]
VSET[3]
VSET[2]
VSET[1]
VSET[0]
0
0
1
1
0
1
0
1
REG4
0x41
ON
DIS
LOWIQ
DELAY[2]
DELAY[1]
DELAY[0]
nFLTMSK
OK
1
0
0
0
0
0
0
R
REG5
0x44
x
x
VSET[5]
VSET[4]
VSET[3]
VSET[2]
VSET[1]
VSET[0]
0
0
1
1
0
1
0
1
REG5
0x45
ON
DIS
LOWIQ
DELAY[2]
DELAY[1]
DELAY[0]
nFLTMSK
OK
1
0
0
0
0
0
0
R
GLOBAL REGISTER MAP
Cont'd in next page.
Note:
SYS: The registers for the system control block; REG1 to REG5: The registers for regulators that generate the OUT1 to
OUT5.
RTC: The registers for Real Time Clock block.
RFU is the bit reserved for future use. R: Read accessible, writing to the bit does not make change to the volume. X is
uncertain volume.



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