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LP38513 数据表(PDF) 2 Page - Texas Instruments |
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LP38513 数据表(HTML) 2 Page - Texas Instruments |
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2 / 20 page ![]() TAB IS GND OUT GND EN 1 2 3 4 5 IN ERROR TAB IS GND OUT GND EN 1 2 3 4 5 IN ERROR LP38513 SNVS361C – JULY 2007 – REVISED MARCH 2009 www.ti.com Connection Diagrams Figure 1. 5-Lead TO-220, Top View Figure 2. 5-Lead DDPAK/TO-263, Top View See NDH005D Package See KTT Package Pin Descriptions for TO-220 and DDPAK/TO-263 5-Pin Packages TO-220 and Pin # Function DDPAK/TO-263 Enable. Pull high to enable the output, low to disable the output. This pin has no internal bias 1 EN and must be tied to the input voltage, or actively driven. 2 IN Input Supply Pin 3 GND Ground 4 OUT Regulated Output Voltage Pin 5 ERROR ERROR Flag. A high level indicates that VOUT is within (tbd)% of the nominal regulated voltage. The TO-220 and DDPAK/TO-263 TAB is used as a thermal connection to remove heat from the TAB TAB device to an external heatsink. The TAB is internally connected to device pin 3. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Storage Temperature Range −65°C to +150°C TO-220, Wave 260°C, 10s Soldering Temperature(3) DPAK/TO-263 235°C, 30s ESD Rating(4) ±2 kV Power Dissipation(5) Internally Limited Input Pin Voltage (Survival) −0.3V to +6.0V Enable Pin Voltage (Survival) −0.3V to +6.0V Output Pin Voltage (Survival) −0.3V to +6.0V ERROR Pin Voltage (Survival) 0.3V to +6.0V IOUT (Survival) Internally Limited (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and conditions, see the Electrical Characteristics. (2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. (3) Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperatures and times are for Sn-Pb (STD) only. (4) The human body model is a 100pF capacitor discharged through a 1.5k Ω resistor into each pin. Test method is per JESD22-A114. (5) Device operation must be evaluated, and derated as needed, based on ambient temperature (TA), power dissipation (PD), maximum allowable operating junction temperature (TJ(MAX)), and package thermal resistance (θJA). 2 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Links: LP38513 |
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