ADC0803 datasheet(40/49 Pages) TI1

40 / 49 page

ADC0801, ADC0802

ADC0803, ADC0804, ADC0805

SNOSBI1B – NOVEMBER 2009 – REVISED FEBRUARY 2013

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NOTE: All numerical values are hexadecimal representations.

Figure 65. Software for Auto-Zeroed Differential A/D

The following notes apply:

•

It is assumed that the CPU automatically performs a RST 7 instruction when a valid interrupt is acknowledged

(CPU is in interrupt mode 1). Hence, the subroutine starting address of X0038.

•

The address bus from the Z-80 and the data bus to the Z-80 are assumed to be inverted by bus drivers.

•

A/D data and identifying words will be stored in sequential memory locations starting at the arbitrarily chosen

address X 3E00.

•

The stack pointer must be dimensioned in the main program as the RST 7 instruction automatically pushes

the PC onto the stack and the subroutine uses an additional 6 stack addresses.

•

The peripherals of concern are mapped into I/O space with the following port assignments:

HEX PORT ADDRESS

PERIPHERAL

HEX PORT ADDRESS

PERIPHERAL

MM74C374 8-bit flip-flop

A/D 4

A/D 1

A/D 5

A/D 2

A/D 6

A/D 3

A/D 7

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