TSL1401CS−LF

128 × 1 LINEAR SENSOR ARRAY WITH HOLD

TAOS072E − APRIL 2007

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Copyright E 2007, TAOS Inc.

The LUMENOLOGY r Company

www.taosinc.com

Terminal Functions

TERMINAL

DESCRIPTION

NAME

NO.

DESCRIPTION

AO

6

Analog output

CLK

3

Clock. The clock controls charge transfer, pixel output, and reset.

GND

4, 5

Ground (substrate). All voltages are referenced to the substrate.

HOLD

2

Hold signal. HOLD freezes the result of a 128 pixel scan.

SI

1

Serial input. SI defines the start of the data-out sequence.

SO

7

Serial output. SO provides a signal to drive the SI input of another device

for cascading or as an end-of-data indication.

8

Supply voltage. Supply voltage for both analog and digital circuits.

Detailed Description

The sensor consists of 128 photodiodes arranged in a linear array. Light energy impinging on a photodiode

generates photocurrent, which is integrated by the active integration circuitry associated with that pixel.

During the integration period, a sampling capacitor connects to the output of the integrator through an analog

switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the

integration time.

The output and reset of the integrators is controlled by a 128-bit shift register and reset logic. An output cycle

is initiated by clocking in a logic 1 on SI. For proper operation, after meeting the minimum hold time condition,

SI must go low before the next rising edge of the clock. The signal called Hold is normally connected to SI. Then,

the rising edge of SI causes a HOLD condition. This causes all 128 sampling capacitors to be disconnected from

their respective integrators and starts an integrator reset period. As the SI pulse is clocked through the shift

register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output

amplifier that generates a voltage on analog output AO. Simultaneously, during the first 18 clock cycles, all pixel

the SI pulse is clocked out of the shift register and the analog output AO assumes a high impedance state. Note

a known state. If a minimum integration time is desired, the next SI pulse may be presented after a minimum

AO is an op amp-type output that does not require an external pull-down resistor. This design allows a rail-to-rail

for saturation light level.

When the device is not in the output phase, AO is in a high-impedance state.

The voltage developed at analog output (AO) is given by:

where:

is the analog output voltage for white condition

is the analog output voltage for dark condition

is integration time in seconds

The TSL1401CS−LF is intended for use in a wide variety of applications, including: image scanning, mark and

code reading, optical character recognition (OCR) and contact imaging, edge detection and positioning, and

optical linear and rotary encoding.