Pad Description

Pad No.

Pad Name

I/O

Description

1~26

Y14~Y39

O

LCD driver outputs for segments*

27

DO39

O

Shift register output for the 40th bit data

28

DI20

I

Input data of shift register 2

29

DO19

O

Shift register output for the 20th bit data

30

VEE

I

LCD power supply

31, 32

V3, V2

I

LCD bias supply voltage

33

VSS

—

Negative power supply

34

VDD

—

Positive power supply

35

CLK

I

Clock pulse input for the shift register

36

DI0

I

Input data of shift register 1

37

LOAD

I

Latching signal to latch shift register data

38

ALT

I

Alternate input signal for LCD driving waveforms

39~52

Y0~Y13

O

LCD driver outputs for segments*

*: For Y0~Y39, any of VDD, V2, V3 or VEE can be selected as a display driving source according

to the combination of latched data level and ALT signal. Refer to the following table:

Latched Data

ALT

Display Data Output Level

H

L

HV3

LV2

Absolute Maximum Ratings*

Supply Voltage ................................. –0.3V to 6V

Storage Temperature................. –50

Operating Temperature............... –20

*Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maxi-

mum Ratings” may cause substantial damage to the device. Functional operation of this

device at other conditions beyond those listed in the specification is not implied and prolonged

exposure to extreme conditions may affect device reliability.

HT1602

3

28th Aug ’98