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Atmel | SMART SAM R21 [PRELIMINARY DATASHEET SUMMARY]

Atmel-42223AS–SAM-R21_Summary–07/2014

5.

I/O Multiplexing and Considerations

5.1

Multiplexed Signals

Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be assigned to one of the

peripheral functions A, B, C, D, E, F, G or H. To enable a peripheral function on a pin, the Peripheral Multiplexer Enable

bit in the Pin Configuration register corresponding to that pin (PINCFGn.PMUXEN, n = 0..31) in the PORT must be

written to one. The selection of peripheral function A to H is done by writing to the Peripheral Multiplexing Odd and Even

bits in the Peripheral Multiplexing register (PMUXn.PMUXE/O) in the PORT.

Table 5-1 describes the peripheral signals multiplexed to the PORT I/O pins.

Table 5-1.

PORT Function Multiplexing

Pin

I/O Pin Supply Type

A

B(1)(2)

C

D

E

F

G

H

SAMR21

E

SAMR21

G

EIC

REF

ADC

AC

PTC

SERCOM

(1)(2)

SERCOM-

ALT

TC

TCC

FECTRL

TCC

SERCOM COM

AC/

GCLK

1

PA00 VDDANA

SERCOM1/

PAD[0]

TCC2/WO[0]

2

PA01 VDDANA

EXTINT[1]

SERCOM1/

PAD[1]

TCC2/WO[1]

9

PA04 VDDANA

EXTINT[4]

ADC/

VREFB

AIN[4]

AIN[0]

Y[2]

SERCOM0/

PAD[0]

TCC0/WO[0]

10

PA05 VDDANA

EXTINT[5]

AIN[5]

AIN[1]

Y[3]

SERCOM0/

PAD[1]

TCC0/WO[1]

7

11

PA06 VDDANA

EXTINT[6]

AIN[6]

AIN[2]

Y[4]

SERCOM0/

PAD[2]

TCC1/WO[0]

8

12

PA07 VDDANA

EXTINT[7]

AIN[7]

AIN[3]

Y[5]

SERCOM0/

PAD[3]

TCC1/WO[1]

9

15

PA08

VDDIO

NMI

AIN[16]

X[0]

SERCOM0/

PAD[0]

SERCOM2/

PAD[0]

TCC0/WO[0] FECTRL[0]

10

16

PA09

VDDIO

EXTINT[9]

AIN[17]

X[1]

SERCOM0/

PAD[1]

SERCOM2/

PAD[1]

TCC0/WO[1] FECTRL[1]

21

PA12

VDDIO

SERCOM2/

PAD[0]

TCC2/WO[0] FECTRL[2]

AC/

CMP[0]

22

PA13

VDDIO

SERCOM2/

PAD[1]

TCC2/WO[1] FECTRL[3]

AC/

CMP[1]

15

23

PA14

VDDIO

EXTINT[14]

SERCOM2/

PAD[2]

TC3/WO[0] FECTRL[4]

GCLK_IO[0]

16

24

PA15

VDDIO

EXTINT[15]

SERCOM2/

PAD[3]

TC3/WO[1] FECTRL[5]

GCLK_IO[1]

17

25

PA16

VDDIO

X[4]

SERCOM1/

PAD[0]

SERCOM3/

PAD[0]

TCC2/WO[0]

TCC0/

WO[0]

GCLK_IO[2]

18

26

PA17

VDDIO

EXTINT[1]

X[5]

SERCOM1/

PAD[1]

SERCOM3/

PAD[1]

TCC2/WO[1]

TCC0/

WO[1]

GCLK_IO[3]

19

27

PA18

VDDIO

EXTINT[2]

X[6]

SERCOM1/

PAD[2]

SERCOM3/

PAD[2]

TC3/WO[0]

TCC0/

WO[2]

AC/

CMP[0]

20

28

PA19

VDDIO

EXTINT[3]

X[7]

SERCOM1/

PAD[3]

SERCOM3/

PAD[3]

TC3/WO[1]

TCC0/

WO[3]

AC/

CMP[1]

31

PA22

VDDIO

EXTINT[6]

X[10]

SERCOM3/

PAD[0]

SERCOM5/

PAD[0]

TC4/WO[0]

TCC0/

WO[4]

GCLK_IO[6]

32

PA23

VDDIO

EXTINT[7]

X[11]

SERCOM3/

PAD[1]

SERCOM5/

PAD[1]

TC4/WO[1]

TCC0/

WO[5]

GCLK_IO[7]

22

33

PA24

VDDIO

EXTINT[12]

SERCOM3/

PAD[2]

SERCOM5/

PAD[2]

TC5/WO[0]

TCC1/

WO[2]

USB_DM

23

34

PA25

VDDIO

EXTINT[13]

SERCOM3/

PAD[3]

SERCOM5/

PAD[3]

TC5/WO[1]

TCC1/

WO[3]

USB_DP