GMS81C2012 datasheet(27/92 Pages) HYNIX

27 / 92 page

Hyundai Micro Electronics

GMS81C2020/GMS81C2120

Nov. 1999 Ver 0.0

preliminary

Figure 11-3 PSW (Program Status Word) Register

[Interrupt disable flag I]

This flag enables/disables all interrupts except interrupt

caused by Reset or software BRK instruction. All inter-

rupts are disabled when cleared to "0". This flag immedi-

ately becomes "0" when an interrupt is served. It is set by

the EI instruction and cleared by the DI instruction.

[Half carry flag H]

After operation, this is set when there is a carry from bit 3

of ALU or there is no borrow from bit 4 of ALU. This bit

can not be set or cleared except CLRV instruction with

Overflow flag (V).

[Break flag B]

This flag is set by software BRK instruction to distinguish

BRK from TCALL instruction with the same vector ad-

dress

[Direct Page flag G]

This flag assign direct page(0-page, 1-page) for direct ad-

dressing mode. When G-flag is "0", the direct addressing

space is in 0-page(0000h ~ 00FFH). When G-flag is "1",

the direct addressing space is in 1-page(0100h ~ 01FFH).

It is set and clreared by SETG, CLRG instruction.

[Overflow flag V]

This flag is set to "1" when an overflow occurs as the result

of an arithmetic operation involving signs. An overflow

occurs when the result of an addition or subtraction ex-

ceeds +127(7FH) or -128(80H). The CLRV instruction

clears the overflow flag. There is no set instruction. When

the BIT instruction is executed, bit 6 of memory is copied

to this flag.

[Negative flag N]

This flag is set to match the sign bit (bit 7) status of the re-

sult of a data or arithmetic operation. When the BIT in-

struction is executed, bit 7 of memory is copied to this flag.

NEGATIVE FLAG

MSB

LSB

[RESET VALUE : 00H

PSW

OVERFLOW FLAG

DIRECT PAGE FLAG

CARRY FLAG RECEIVES

ZERO FLAG

INTERRUPT ENABLE FLAG

CARRY OUT

HALF CARRY FLAG RECEIVES

CARRY OUT FROM BIT 1 OF

ADDITION OPERLANDS

BREAK FLAG

GMS81C2012 数据表(PDF) 27 Page - Hynix Semiconductor

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