STAC9704 datasheet(35/49 Pages) HYNIX

部件名	STAC9704

功能描述	Multimedia Audio Codec for AC97

PDF	49 Pages

Scroll/Zoom	100%

制造商	HYNIX [Hynix Semiconductor]

网页	http://www.skhynix.com/kor/main.do

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35 / 49 page

SigmaTel, Inc.

STAC9704/7

10/02/98

Table 20: Warm Reset

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

SYNC active high pulse width

Tsync_high

1.3

SYNC inactive to BIT_CLK startup delay

Tsync_2clk

162.8

7.3 Clocks

Figure 16: Clocks

BIT_CLK

SYNC

Tclk_high

Tclk_low

Tclk_period

Tsync_low

Tsync_high

Tsync_period

Table 21: Clocks

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

BIT_CLK frequency

12.288

MHz

BIT_CLK period

Tclk_period

81.4

BIT_CLK output jitter

750

BLT_CLK high pulsewidth (note 1)

Tclk_high

32.56

40.7

48.84

BIT_CLK low pulse width (note 1)

Tclk_low

32.56

40.7

48.84

SYNC frequency

48.0

kHz

SYNC period

Tsync_period

20.8

SYNC high pulse width

Tsync_high

1.3

SYNC low_pulse width

Tsync_low

19.5

Notes: 1) Worst case duty cycle restricted to 40/60.

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