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ICS1892 数据表(PDF) 4 Page - Integrated Circuit Systems

部件名 ICS1892
功能描述  10Base-T/100Base-TX Integrated PHYceiver
PDF  148 Pages
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制造商  ICST [Integrated Circuit Systems]
网页  http://www.icst.com
标志 ICST - Integrated Circuit Systems

ICS1892 数据表(HTML) 4 Page - Integrated Circuit Systems

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ICS1892, Rev. D, 2/26/01
February 26, 2001
4
Table of Contents
ICS1892 Data Sheet
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Table of Contents
Section
Title
Page
Chapter 8
Management Register Set................................................................... 58
8.1
Introduction to Management Register Set ................................................. 59
8.1.1
Management Register Set Outline ............................................................ 59
8.1.2
Management Register Bit Access ............................................................. 60
8.1.3
Management Register Bit Default Values .................................................. 60
8.1.4
Management Register Bit Special Functions ............................................. 61
8.2
Register 0: Control Register ...................................................................... 62
8.2.1
Reset (bit 0.15) .......................................................................................... 62
8.2.2
Loopback Enable (bit 0.14) ........................................................................ 63
8.2.3
Data Rate Select (bit 0.13) ........................................................................ 63
8.2.4
Auto-Negotiation Enable (bit 0.12) ............................................................ 63
8.2.5
Low Power Mode (bit 0.11) ........................................................................ 64
8.2.6
Isolate (bit 0.10) ......................................................................................... 64
8.2.7
Restart Auto-Negotiation (bit 0.9) .............................................................. 64
8.2.8
Duplex Mode (bit 0.8) ................................................................................ 65
8.2.9
Collision Test (bit 0.7) ................................................................................ 65
8.2.10
IEEE Reserved Bits (bits 0.6:0) ................................................................. 65
8.3
Register 1: Status Register ........................................................................ 66
8.3.1
100Base-T4 (bit 1.15) ................................................................................ 66
8.3.2
100Base-TX Full Duplex (bit 1.14) ............................................................ 67
8.3.3
100Base-TX Half Duplex (bit 1.13) ............................................................ 67
8.3.4
10Base-T Full Duplex (bit 1.12) ................................................................. 67
8.3.5
10Base-T Half Duplex (bit 1.11) ................................................................ 67
8.3.6
IEEE Reserved Bits (bits 1.10:7) ............................................................... 68
8.3.7
MF Preamble Suppression (bit 1.6) ........................................................... 68
8.3.8
Auto-Negotiation Complete (bit 1.5) .......................................................... 68
8.3.9
Remote Fault (bit 1.4) ................................................................................ 69
8.3.10
Auto-Negotiation Ability (bit 1.3) ................................................................ 69
8.3.11
Link Status (bit 1.2) .................................................................................... 69
8.3.12
Jabber Detect (bit 1.1) ............................................................................... 70
8.3.13
Extended Capability (bit 1.0) ..................................................................... 70
8.4
Register 2: PHY Identifier Register ............................................................ 71



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