ICS514

LOCO™ PLL Clock Generator

MDS 514 B

3

Revision 080699

Printed 11/13/00

Integrated Circuit Systems • 525 Race Street • San Jose•CA • 95126 • (408)295-9800tel• (408)295-9818fax

Parameter

Conditions

Minimum

Typical

Maximum

Units

ABSOLUTE MAXIMUM RATINGS (stresses bee ond these can permaneentl damage tthe device)

Supply Voltage, VDD

Referenced to GND

7

V

Inputs

Referenced to GND

-0.5

VDD+0.5

V

Clock Output

Referenced to GND

-0.5

VDD+0.5

V

Ambient Operating Temperature

0

70

°C

Soldering Temperature

Max of 10 seconds

260

°C

Storage temperature

-65

150

°C

DC CHARACTERISTICS (VDD = 5.0 V unless otherwise noted)

Operating Voltage, VDD

3

5.5

V

Input High Voltage, VIH, ICLK only

ICLK (Pin 1)

(VDD/2)+1

VDD/2

V

Input Low Voltage, VIL, ICLK only

ICLK (Pin 1)

VDD/2

(VDD/2)-1

V

Input High Voltage, VIH

S0

2

V

Input Low Voltage, VIL

S0

0.8

V

Input High Voltage, VIH

S1

VDD-0.5

V

Input Low Voltage, VIM

S1

VDD/2

V

Input Low Voltage, VIL

S1

0.5

V

Output High Voltage, VOH

IOH=-25mA

2.4

V

Output Low Voltage, VOL

IOL=25mA

0.4

V

IDD Operating Supply Current

No Load, 66.66MHz

20

mA

IDD Power Down Supply Current, 3.3 V

S1 = S0 = 0

1.5

mA

Short Circuit Current

CLK output

±70

mA

On-Chip Pull-up Resistor

Pin 6

270

k

Ω

Input Capacitance, S1, S0

Pins 6, 7

4

pF

AC CHARACTERISTICS (VDD = 5.0 V unless otherwise noted)

Input Frequency, crystal input

5

14.31818

27

MHz

Input Frequency, clock input

2

14.31818

50

MHz

Output Frequency

VDD = 4.5 to 5.5 V

14

66.66

140

MHz

Output Frequency

VDD = 3.0 to 3.6 V

14

66.66

100

MHz

Output Clock Rise Time

0.8 to 2.0V

1

ns

Output Clock Fall Time

2.0 to 0.8V

1

ns

Output Clock Duty Cycle

1.5V, up to 140 MHz

45

49 to 51

55

%

Power up time, from PD to outputs stable

5

10

ms

Power down time, from running to PD state

50

ns

Absolute Clock Period Jitter

Deviation from mean

±110

ps

One Sigma Clock Period Jitter

40

ps

Electrical Specifications