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ICS552G-02 数据表(PDF) 1 Page - Integrated Circuit Systems |
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ICS552G-02 数据表(HTML) 1 Page - Integrated Circuit Systems |
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1 / 6 page ![]() ICS552-02 MDS 552-02 B 1 Revision 050401 In tegr ated C i r cu i t S y st ems q 5 25 Ra ce Str eet, San Jose, C A 95 126 q tel ( 408) 2 95-9 800 q w w w.ic s t .c o m LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER Description The ICS552-02 is a low skew, single-input to eight- output clock buffer. It is part of ICS’ Clock BlocksTM family. See the ICS553 for a 1 to 4 low skew buffer. For more than 8 outputs see the MK74CBxxx BuffaloTM series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features • Extremely low skew outputs (50ps maximum) • Packaged in 16 pin TSSOP • Low power CMOS technology • Operating Voltages of 2.5 V to 5 V • Output Enable pin tri-states outputs • 5 V tolerant input clocks • Input/Output clock frequency up to 200 MHz • Input clock multiplexer simplifies clock selection Block Diagram OE Q3 Q4 Q2 Q5 Q6 Q1 Q0 Q7 IN A IN B 1 0 SE L A |
类似零件编号 - ICS552G-02 |
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类似说明 - ICS552G-02 |
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