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ICS8701 数据表(PDF) 12 Page - Integrated Circuit Systems

部件名 ICS8701
功能描述  LOW SKEW 첨1, 첨2 CLOCK GENERATOR
PDF  15 Pages
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制造商  ICST [Integrated Circuit Systems]
网页  http://www.icst.com
标志 ICST - Integrated Circuit Systems

ICS8701 数据表(HTML) 12 Page - Integrated Circuit Systems

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8701CY
www.icst.com/products/hiperclocks.html
REV. B AUGUST 2, 2001
12
Integrated
Circuit
Systems, Inc.
ICS8701
LOW SKEW
÷1, ÷2
CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVCMOS output driver circuit and termination are shown in
Figure 7.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
Ω load, and a termination
voltage of V
DD
- 2V.
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = (V
OH_MAX
/R
L
) * (V
DD_MAX
- V
OH_MAX
)
Pd_L = (V
OL_MAX
/R
L
) * (V
DD_MAX
- V
OL_MAX
)
For logic high, V
OUT
= V
OH_MAX
= V
DD_MAX
– 1.2V
For logic low, V
OUT
= V
OL_MAX
= V
DD_MAX
– 0.4V
Pd_H = (1.2V/50
Ω) * (2V - 1.2V) = 19.2mW
Pd_L = (0.4V/50
Ω) * (2V - 0.4V) = 12.8mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 32mW
FIGURE 7 - LVCMOS DRIVER CIRCUIT AND TERMINATION
V
DDO
V
OUT
RL
50
Q1



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