Integrated

Circuit

Systems, Inc.

General Description

Features

ICS9159-20

Frequency Generator for SIS551X and SIS6205 Chip Set Systems

9159-20 Rev B 040597

Block Diagram

The ICS9159-20 is a low-cost frequency generator designed

specifically for SIS551X chip set and SIS6205 VGA control-

ler. The integrated buffer minimizes skew. A 14.31818 MHz

XTAL oscillator provides the reference clock to generate

standard Pentium™ frequencies. The CPU clock makes grad-

ual frequency transitions without violating the PLL timing

of internal microprocessor clock multipliers.

Both synchronous and asynchronous bus designs are sup-

ported. For chip sets that require an early CPU clock, the

buffers are driven by the CPU clock. In this configuration, the

CPU clock becomes the early clock and the output of the

uncommitted buffers become the bus synchronized bus clocks.

•

One selectable CPU clocks operate up to 66.66 MHz

•

5 uncommitted buffers

•

Maximum CPU jitter of ±200ps

•

7 BUS clocks support sync or async bus operation

•

500ps skew window for all synchronous clock edges

•

Integrated buffer outputs drive up to 30pF loads

•

3.1V - 3.5V supply range

•

28-pin 300-mil SOIC package

•

Supports chip sets requiring early CPU clocking

Pentium is a trademark of Intel Corporation.

Functionality

All frequencies in MHz, assuming 14.318 MHz input.

Applications

•

Ideal for green Pentium and P6 PCI systems based on the

SIS5596 chip set

Pin Configuration

28-Pin SOIC

3.3V±10%, 0-70°C

Crystal (X1, X2) = 14.318181 MHz

FS1

FS0

REF

(MHz)

CPU

(MHz)

BCLK (MHz)

BSEL=1 BSEL=0

0

0

Tistate

Tristate

Tristate

Tristate

0

1

14.318

50

25

33.33

1

0

14.318

60

30

33.33

1

1

14.318

66.66

33.33

33.33

ICS reserves the right to make changes in the device data identified in this publication

without further notice. ICS advises its customers to obtain the latest version of all

device data to verify that any information being relied upon by the customer is current

and accurate.